Commit graph

300 commits

Author SHA1 Message Date
Laurențiu Nicola
c9a98f9a9f Merge commit '9b3d03408c66749d56466bb09baf2a7177deb6ce' into sync-from-ra 2023-08-21 12:44:09 +03:00
Jessie Chatham Spencer
37e0e8af10 Implement extern crate completion 2023-08-20 16:36:59 +00:00
Lukas Wirth
637f496a81 fix: Fix auto-import (and completions) importing #[doc(hidden)] items 2023-08-17 12:30:19 +02:00
bors
f73cd39f7b Auto merge of #15383 - max-heller:issue-12568, r=Veykril
Suggest type completions for type arguments and constant completions for constant arguments

When determining completions for generic arguments, suggest only types or only constants if the corresponding generic parameter is a type parameter or constant parameter.

Closes #12568
2023-08-15 06:39:50 +00:00
dirreke
de5f94212f fix the wrong number in const KNOWN_ARCH 2023-08-14 23:02:37 +08:00
Dirreke
504dbd10ca add a csky-unknown-linux-gnuabiv2 target 2023-08-14 23:02:36 +08:00
Seth Pellegrino
d168b3e22f feat: riscv-interrupt-{m,s} calling conventions
Similar to prior support added for the mips430, avr, and x86 targets
this change implements the rough equivalent of clang's
[`__attribute__((interrupt))`][clang-attr] for riscv targets, enabling
e.g.

```rust
static mut CNT: usize = 0;

pub extern "riscv-interrupt-m" fn isr_m() {
    unsafe {
        CNT += 1;
    }
}
```

to produce highly effective assembly like:

```asm
pub extern "riscv-interrupt-m" fn isr_m() {
420003a0:       1141                    addi    sp,sp,-16
    unsafe {
        CNT += 1;
420003a2:       c62a                    sw      a0,12(sp)
420003a4:       c42e                    sw      a1,8(sp)
420003a6:       3fc80537                lui     a0,0x3fc80
420003aa:       63c52583                lw      a1,1596(a0) # 3fc8063c <_ZN12esp_riscv_rt3CNT17hcec3e3a214887d53E.0>
420003ae:       0585                    addi    a1,a1,1
420003b0:       62b52e23                sw      a1,1596(a0)
    }
}
420003b4:       4532                    lw      a0,12(sp)
420003b6:       45a2                    lw      a1,8(sp)
420003b8:       0141                    addi    sp,sp,16
420003ba:       30200073                mret
```

(disassembly via `riscv64-unknown-elf-objdump -C -S --disassemble ./esp32c3-hal/target/riscv32imc-unknown-none-elf/release/examples/gpio_interrupt`)

This outcome is superior to hand-coded interrupt routines which, lacking
visibility into any non-assembly body of the interrupt handler, have to
be very conservative and save the [entire CPU state to the stack
frame][full-frame-save]. By instead asking LLVM to only save the
registers that it uses, we defer the decision to the tool with the best
context: it can more accurately account for the cost of spills if it
knows that every additional register used is already at the cost of an
implicit spill.

At the LLVM level, this is apparently [implemented by] marking every
register as "[callee-save]," matching the semantics of an interrupt
handler nicely (it has to leave the CPU state just as it found it after
its `{m|s}ret`).

This approach is not suitable for every interrupt handler, as it makes
no attempt to e.g. save the state in a user-accessible stack frame. For
a full discussion of those challenges and tradeoffs, please refer to
[the interrupt calling conventions RFC][rfc].

Inside rustc, this implementation differs from prior art because LLVM
does not expose the "all-saved" function flavor as a calling convention
directly, instead preferring to use an attribute that allows for
differentiating between "machine-mode" and "superivsor-mode" interrupts.

Finally, some effort has been made to guide those who may not yet be
aware of the differences between machine-mode and supervisor-mode
interrupts as to why no `riscv-interrupt` calling convention is exposed
through rustc, and similarly for why `riscv-interrupt-u` makes no
appearance (as it would complicate future LLVM upgrades).

[clang-attr]: https://clang.llvm.org/docs/AttributeReference.html#interrupt-risc-v
[full-frame-save]: 9281af2ecf/src/lib.rs (L440-L469)
[implemented by]: b7fb2a3fec/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (L61-L67)
[callee-save]: 973f1fe7a8/llvm/lib/Target/RISCV/RISCVCallingConv.td (L30-L37)
[rfc]: https://github.com/rust-lang/rfcs/pull/3246
2023-08-08 18:09:56 -07:00
Max Heller
fb98f522d2 fixme 2023-08-08 20:55:35 -04:00
Max Heller
400f618a5c convert TypeLocation::GenericArg to struct variant 2023-08-08 20:37:23 -04:00
Max Heller
0b57fa3931 test 2023-08-08 20:09:50 -04:00
Max Heller
a1d9e453b9 Apply suggestions from code review
Co-authored-by: Lukas Wirth <lukastw97@gmail.com>
2023-08-08 20:05:24 -04:00
Max Heller
0c21d8538c FIXME 2023-08-06 12:04:33 -04:00
Max Heller
bb9d8229b8 cleanup 2023-08-06 12:04:29 -04:00
Max Heller
bed1114b8b handle omitted lifetime params 2023-08-05 09:07:29 -04:00
Max Heller
d48606fefe unroll test loop 2023-08-05 08:22:58 -04:00
Max Heller
5e6d646ccc remove unnecessary branch 2023-08-05 08:14:44 -04:00
Max Heller
ee39905370 update tests 2023-08-05 08:13:13 -04:00
Max Heller
1b3e20fe68 handle more cases 2023-08-02 17:59:26 -04:00
Max Heller
f4038a6bf1 support AssocTypeArg and MethodCalls 2023-08-02 11:36:09 -04:00
Max Heller
a743903cf0 remove unicode-ident dependency 2023-08-01 18:18:12 -04:00
Max Heller
b9ee4a5167 working for path segments 2023-07-31 21:21:40 -04:00
Max Heller
91581becac update tests 2023-07-30 16:01:59 -04:00
Max Heller
c4cff80269 use nodes from actual file 2023-07-30 11:12:49 -04:00
Max Heller
784379eb79 wip 2023-07-29 15:23:35 -04:00
Max Heller
4bb7702833 check_edit test 2023-07-29 11:39:59 -04:00
Max Heller
bc2b70d678 formatting 2023-07-28 09:23:05 -04:00
Max Heller
047bc47ecd
Cleanup
Co-authored-by: LowR <low.ryoshida@gmail.com>
2023-07-28 09:22:22 -04:00
Max Heller
9349769363 exclude non-identifier aliases from completion filtering text 2023-07-27 19:33:00 -04:00
hkalbasi
3a1054fc1c Replace x with it 2023-07-06 17:33:17 +03:30
bors
daba334611 Auto merge of #15206 - Veykril:let-else-fmt, r=Veykril
internal: Format let-else

As nightly finally got support for it I went ahead and formatted r-a with the latest nightly, then with the latest stable (in case other stuff changed)
2023-07-03 18:41:59 +00:00
Lukas Wirth
69cd3c30ac Format let-else 2023-07-03 20:34:09 +02:00
Ryo Yoshida
8cd4e9f7ec
Merge assoc_items_only and exclude_import_kinds into assoc_mode 2023-06-30 23:37:10 +09:00
hkalbasi
f53f9230f0 Support #[derive_const(Trait)] 2023-06-29 20:58:35 +03:30
Lukas Wirth
58ac823864 Less eager parsing for module sources 2023-06-17 10:58:52 +02:00
Ryo Yoshida
d01283b1f7
Deduplicate tuple indices for completion 2023-06-13 18:01:54 +09:00
Ryo Yoshida
42eab5e100
Deduplicate field names for completion 2023-06-11 19:34:27 +09:00
Ryo Yoshida
b4795507e3
autoderef: completely resolve and deduplicate types 2023-06-11 19:34:22 +09:00
Ryo Yoshida
d091991491
fix(completion): derive source scope from syntax node to be transformed 2023-06-11 15:25:43 +09:00
ponyii
7f45cccda4 lifetime transformation: refactoring & a new test 2023-06-03 21:34:31 +04:00
Lukas Wirth
dc7c6d43c7 Slightly shrink DefMap 2023-06-01 14:46:36 +02:00
hkalbasi
51368793b4 MIR episode 6 2023-05-28 23:25:15 +03:30
Lukas Wirth
c7ef6c25b7 internal: Replace Display impl for Name 2023-05-24 20:55:12 +02:00
Ryo Yoshida
68a74decb6
Process macro_use prelude in semantic scope resolver 2023-05-17 17:45:44 +09:00
hecatia-elegua
2a182f3f1f Add doc(alias)-based method completion 2023-05-10 12:51:08 +02:00
bors
420a038da9 Auto merge of #14513 - hecatia-elegua:alias-based-completion2, r=Veykril
doc(alias)-based completion round 2

Follow-up on #14433
We can now complete fields, functions and some use/mods.
Flyimports don't behave, I don't really have the time to understand the structure there either.
While reading the flyimport code, I removed one method only used there, the closure-tree was a bit confusing, I can revert that if you want.
2023-04-24 06:34:25 +00:00
bors
2400b36a2e Auto merge of #14577 - jsoref:spelling, r=lnicola
Spelling

This PR corrects misspellings identified by the [check-spelling action](https://github.com/marketplace/actions/check-spelling).

The misspellings have been reported at https://github.com/jsoref/rust-analyzer/actions/runs/4699991040#summary-12751355796

The action reports that the changes in this PR would make it happy: https://github.com/jsoref/rust-analyzer/actions/runs/4699991284#summary-12751356293

closes #14567
2023-04-19 14:05:40 +00:00
Josh Soref
bc7d84c3ce Spelling
* a rule
* access
* after
* amount
* annotations
* assignment
* assist
* associated
* attribute
* borrowed
* built-in type
* clarification
* command
* const
* constructor
* corresponding
* counterparts
* curlies
* dependencies
* deterministic
* diagnostic
* duplicates
* edge
* edited
* efficient
* elsewhere
* execution
* expression
* extensions
* extracted
* fill
* github
* helper
* heuristic
* incomplete
* indent end
* inlay
* invocation
* lifetime
* looking
* maybe
* move
* mutability
* mutable
* necessarily
* necessary
* negative
* nonexistent
* occurred
* offsets
* offsetted
* overridden
* parameters
* params
* params_and_where_preds_in_scope
* paredit
* parent
* parentheses
* prepended if
* punctuation
* receive
* receiver
* referring
* repeated
* representing
* semantically
* separately
* shouldnot
* siblings
* similar
* something's
* statement
* struct
* structure
* surprise
* the
* this
* transparent
* unimplemented
* unnamed
* unnecessary
* unneeded
* unreachable
* unterminated
* utilities
* variant
* variants
* visibility
* work around (v)
* workaround

Signed-off-by: Josh Soref <2119212+jsoref@users.noreply.github.com>
2023-04-19 09:45:55 -04:00
Ryo Yoshida
4db87f9346
Fix release channel detection
See bootstrap code in rust-lang/rust for versioning details: e49122fb1c/src/bootstrap/lib.rs (L1244)
2023-04-18 02:12:17 +09:00
Ryo Yoshida
ac03de773f
Add flag to disallow opaque types for DisplayTarget::SourceCode 2023-04-12 19:03:48 +09:00
hecatia-elegua
398af0259f
Merge branch 'master' into alias-based-completion2 2023-04-11 21:14:52 +02:00