mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-11-27 17:00:19 +00:00
380 lines
13 KiB
Python
380 lines
13 KiB
Python
import serial, os, struct, sys, time, json, os.path, gzip, functools
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from asm import ARMAsm
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from proxy import *
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from tgtypes import *
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from sysreg import *
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from malloc import Heap
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import adt
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from contextlib import contextmanager
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SIMD_B = Array(32, Array(16, Int8ul))
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SIMD_H = Array(32, Array(8, Int16ul))
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SIMD_S = Array(32, Array(4, Int32ul))
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SIMD_D = Array(32, Array(2, Int64ul))
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SIMD_Q = Array(32, BytesInteger(16, swapped=True))
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class ProxyUtils(object):
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CODE_BUFFER_SIZE = 0x10000
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def __init__(self, p, heap_size=1024 * 1024 * 1024):
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self.iface = p.iface
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self.proxy = p
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self.base = p.get_base()
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self.ba_addr = p.get_bootargs()
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self.ba = self.iface.readstruct(self.ba_addr, BootArgs)
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# We allocate a 128MB heap, 128MB after the m1n1 heap, without telling it about it.
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# This frees up from having to coordinate memory management or free stuff after a Python
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# script runs, at the expense that if m1n1 ever uses more than 128MB of heap it will
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# clash with Python (m1n1 will normally not use *any* heap when running proxy ops though,
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# except when running very high-level operations like booting a kernel, so this should be
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# OK).
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self.heap_size = heap_size
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try:
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self.heap_base = p.heapblock_alloc(0)
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except ProxyRemoteError:
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# Compat with versions that don't have heapblock yet
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self.heap_base = (self.base + ((self.ba.top_of_kernel_data + 0xffff) & ~0xffff) -
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self.ba.phys_base)
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self.heap_base += 128 * 1024 * 1024 # We leave 128MB for m1n1 heap
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self.heap_top = self.heap_base + self.heap_size
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self.heap = Heap(self.heap_base, self.heap_top)
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self.proxy.heap = self.heap
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self.malloc = self.heap.malloc
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self.memalign = self.heap.memalign
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self.free = self.heap.free
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self.code_buffer = self.malloc(self.CODE_BUFFER_SIZE)
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self.adt_data = None
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self.adt = LazyADT(self)
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self.simd_buf = self.malloc(32 * 16)
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self.simd_type = None
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self.simd = None
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self.exec_modes = {
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None: (self.proxy.call, REGION_RX_EL1),
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"el2": (self.proxy.call, REGION_RX_EL1),
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"el1": (self.proxy.el1_call, 0),
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"el0": (self.proxy.el0_call, REGION_RWX_EL0),
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"gl2": (self.proxy.gl2_call, REGION_RX_EL1),
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"gl1": (self.proxy.gl1_call, 0),
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}
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def mrs(self, reg, *, silent=False, call=None):
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op0, op1, CRn, CRm, op2 = sysreg_parse(reg)
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op = (((op0 & 1) << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5300000)
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return self.exec(op, call=call, silent=silent)
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def msr(self, reg, val, *, silent=False, call=None):
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op0, op1, CRn, CRm, op2 = sysreg_parse(reg)
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op = (((op0 & 1) << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5100000)
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self.exec(op, val, call=call, silent=silent)
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def exec(self, op, r0=0, r1=0, r2=0, r3=0, *, silent=False, call=None, ignore_exceptions=False):
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if callable(call):
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region = REGION_RX_EL1
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elif isinstance(call, tuple):
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call, region = call
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else:
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call, region = self.exec_modes[call]
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if isinstance(op, tuple) or isinstance(op, list):
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func = struct.pack(f"<{len(op)}II", *op, 0xd65f03c0) # ret
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elif isinstance(op, int):
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func = struct.pack("<II", op, 0xd65f03c0) # ret
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elif isinstance(op, str):
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c = ARMAsm(op + "; ret", self.code_buffer)
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func = c.data
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elif isinstance(op, bytes):
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func = op
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else:
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raise ValueError()
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assert len(func) < self.CODE_BUFFER_SIZE
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self.iface.writemem(self.code_buffer, func)
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self.proxy.dc_cvau(self.code_buffer, len(func))
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self.proxy.ic_ivau(self.code_buffer, len(func))
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self.proxy.set_exc_guard(GUARD.SKIP | (GUARD.SILENT if silent else 0))
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ret = call(self.code_buffer | region, r0, r1, r2, r3)
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if not ignore_exceptions:
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cnt = self.proxy.get_exc_count()
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self.proxy.set_exc_guard(GUARD.OFF)
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if cnt:
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raise ProxyError("Exception occurred")
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else:
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self.proxy.set_exc_guard(GUARD.OFF)
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return ret
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inst = exec
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def compressed_writemem(self, dest, data, progress):
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if not len(data):
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return
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payload = gzip.compress(data)
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compressed_size = len(payload)
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with self.heap.guarded_malloc(compressed_size) as compressed_addr:
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self.iface.writemem(compressed_addr, payload, progress)
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timeout = self.iface.dev.timeout
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self.iface.dev.timeout = None
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try:
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decompressed_size = self.proxy.gzdec(compressed_addr, compressed_size, dest, len(data))
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finally:
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self.iface.dev.timeout = timeout
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assert decompressed_size == len(data)
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def get_adt(self):
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if self.adt_data is not None:
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return self.adt_data
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adt_base = self.ba.devtree - self.ba.virt_base + self.ba.phys_base
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adt_size = self.ba.devtree_size
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print(f"Fetching ADT ({adt_size} bytes)...")
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self.adt_data = self.iface.readmem(adt_base, self.ba.devtree_size)
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return self.adt_data
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def push_adt(self):
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self.adt_data = self.adt.build()
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adt_base = self.ba.devtree - self.ba.virt_base + self.ba.phys_base
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adt_size = len(self.adt_data)
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print(f"Pushing ADT ({adt_size} bytes)...")
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self.iface.writemem(adt_base, self.adt_data)
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def disassemble_at(self, start, size, pc=None):
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code = struct.unpack(f"<{size // 4}I", self.iface.readmem(start, size))
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c = ARMAsm(".inst " + ",".join(str(i) for i in code), start)
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lines = list(c.disassemble())
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if pc is not None:
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idx = (pc - start) // 4
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lines[idx] = " *" + lines[idx][2:]
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for i in lines:
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print(" " + i)
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def print_exception(self, code, ctx, addr=lambda a: f"0x{a:x}"):
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print(f" == Exception taken from {ctx.spsr.M.name} ==")
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el = ctx.spsr.M >> 2
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print(f" SPSR = {ctx.spsr}")
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print(f" ELR = {addr(ctx.elr)}" + (f" (0x{ctx.elr_phys:x})" if ctx.elr_phys else ""))
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print(f" ESR = {ctx.esr}")
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print(f" FAR = {addr(ctx.far)}" + (f" (0x{ctx.far_phys:x})" if ctx.far_phys else ""))
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print(f" SP_EL{el} = 0x{ctx.sp[el]:x}" + (f" (0x{ctx.sp_phys:x})" if ctx.sp_phys else ""))
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for i in range(0, 31, 4):
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j = min(30, i + 3)
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print(f" {f'x{i}-x{j}':>7} = {' '.join(f'{r:016x}' for r in ctx.regs[i:j + 1])}")
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if ctx.elr_phys:
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print()
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print(" == Faulting code ==")
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self.disassemble_at(ctx.elr_phys - 4 * 4, 9 * 4, ctx.elr_phys)
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if code == EXC.SYNC:
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if ctx.esr.EC == ESR_EC.MSR or ctx.esr.EC == ESR_EC.IMPDEF and ctx.esr.ISS == 0x20:
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print()
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print(" == MRS/MSR fault decoding ==")
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if ctx.esr.EC == ESR_EC.MSR:
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iss = ESR_ISS_MSR(ctx.esr.ISS)
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else:
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iss = ESR_ISS_MSR(self.mrs(AFSR1_EL2))
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enc = iss.Op0, iss.Op1, iss.CRn, iss.CRm, iss.Op2
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if enc in sysreg_rev:
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name = sysreg_rev[enc]
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else:
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name = f"s{iss.Op0}_{iss.Op1}_c{iss.CRn}_c{iss.CRm}_{iss.Op2}"
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if iss.DIR == MSR_DIR.READ:
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print(f" Instruction: mrs x{iss.Rt}, {name}")
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else:
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print(f" Instruction: msr {name}, x{iss.Rt}")
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if ctx.esr.EC in (ESR_EC.DABORT, ESR_EC.DABORT_LOWER):
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print()
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print(" == Data abort decoding ==")
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iss = ESR_ISS_DABORT(ctx.esr.ISS)
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if iss.ISV:
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print(f" ISS: {iss!s}")
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else:
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print(" No instruction syndrome available")
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print()
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@contextmanager
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def mmu_disabled(self):
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flags = self.proxy.mmu_disable()
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try:
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yield
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finally:
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self.proxy.mmu_restore(flags)
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def push_simd(self):
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if self.simd is not None:
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data = self.simd_type.build(self.simd)
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self.iface.writemem(self.simd_buf, data)
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self.proxy.put_simd_state(self.simd_buf)
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self.simd = self.simd_type = None
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def get_simd(self, simd_type):
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if self.simd is not None and self.simd_type is not simd_type:
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data = self.simd_type.build(self.simd)
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self.simd = simd_type.parse(data)
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self.simd_type = simd_type
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elif self.simd is None:
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self.proxy.get_simd_state(self.simd_buf)
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data = self.iface.readmem(self.simd_buf, 32 * 16)
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self.simd = simd_type.parse(data)
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self.simd_type = simd_type
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return self.simd
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@property
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def b(self):
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return self.get_simd(SIMD_B)
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@property
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def h(self):
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return self.get_simd(SIMD_H)
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@property
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def s(self):
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return self.get_simd(SIMD_S)
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@property
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def d(self):
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return self.get_simd(SIMD_D)
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@property
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def q(self):
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return self.get_simd(SIMD_Q)
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class LazyADT:
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def __init__(self, utils):
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self.__dict__["_utils"] = utils
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@functools.cached_property
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def _adt(self):
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return adt.load_adt(self._utils.get_adt())
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def __getitem__(self, item):
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return self._adt[item]
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def __setitem__(self, item, value):
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self._adt[item] = value
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def __delitem__(self, item):
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del self._adt[item]
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def __getattr__(self, attr):
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return getattr(self._adt, attr)
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def __setattr__(self, attr, value):
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return setattr(self._adt, attr, value)
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def __delattr__(self, attr):
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return delattr(self._adt, attr)
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def __str__(self, t=""):
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return gstr(self._adt)
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def __iter__(self):
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return iter(self._adt)
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class RegMonitor(object):
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def __init__(self, utils):
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self.utils = utils
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self.proxy = utils.proxy
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self.iface = self.proxy.iface
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self.ranges = []
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self.last = None
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base = utils.base
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self.scratch = utils.malloc(0x100000)
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def add(self, start, size):
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self.ranges.append((start, size))
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self.last = [None] * len(self.ranges)
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def poll(self):
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if not self.ranges:
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return
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cur = []
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for (start, size), last in zip(self.ranges, self.last):
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self.proxy.memcpy32(self.scratch, start, size)
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block = self.proxy.iface.readmem(self.scratch, size)
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count = size // 4
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words = struct.unpack("<%dI" % count, block)
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cur.append(words)
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if last == words:
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continue
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row = 8
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for i in range(0, count, row):
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if not last:
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print("%016x" % (start + i * 4), end=" ")
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for new in words[i:i+row]:
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print("%08x" % new, end=" ")
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print()
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elif last[i:i+row] != words[i:i+row]:
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print("%016x" % (start + i * 4), end=" ")
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for old, new in zip(last[i:i+row], words[i:i+row]):
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so = "%08x" % old
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sn = s = "%08x" % new
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if old != new:
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s = "\x1b[32m"
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ld = False
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for a,b in zip(so, sn):
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d = a != b
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if ld != d:
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s += "\x1b[31;1;4m" if d else "\x1b[32m"
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ld = d
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s += b
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s += "\x1b[m"
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print(s, end=" ")
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print()
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self.last = cur
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class GuardedHeap:
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def __init__(self, malloc, memalign=None, free=None):
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if isinstance(malloc, Heap):
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malloc, memalign, free = malloc.malloc, malloc.memalign, malloc.free
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self.ptrs = set()
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self.malloc = malloc
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self.memalign = memalign
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self.free = free
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def __enter__(self):
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return self
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def __exit__(self, *exc):
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self.free_all()
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return False
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def malloc(self, sz):
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ptr = self.malloc(sz)
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self.ptrs.add(ptr)
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return ptr
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def memalign(self, align, sz):
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ptr = self.memalign(align, sz)
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self.ptrs.add(ptr)
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return ptr
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def free(self, ptr):
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self.ptrs.remove(ptr)
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self.free(ptr)
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def free_all(self):
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for ptr in self.ptrs:
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self.free(ptr)
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self.ptrs = set()
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def bootstrap_port(iface, proxy):
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try:
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iface.dev.timeout = 0.15
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iface.nop()
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proxy.set_baud(1500000)
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except UartTimeout:
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iface.dev.baudrate = 1500000
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iface.nop()
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iface.dev.timeout = 3
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