Daniel Berlin c45da55256 More support for M3 chips ... The UART base has moved from the M2 chips. Everest settings introduce some changes to unknown registers The MCC data has changed as well. There is a drive-by change where I discovered what some of the unknown HID18 bits are and documented them. Signed-off-by: Daniel Berlin <dberlin@dberlin.org>		2023-12-03 17:37:20 +09:00
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apple_regs.json	More support for M3 chips	2023-12-03 17:37:20 +09:00
arm_regs.json	m1n1.sysreg & co: Add support for op-like sysregs (e.g. TLBI)	2022-08-17 14:01:07 +09:00
gen_reg_class.py	tools/gen_reg_class.py: Fix multibit field defs	2021-09-21 23:28:42 +09:00
gen_reg_include.py	gxf: add support for guarded exception levels	2021-05-11 15:48:40 +09:00
reg2json.py	m1n1.sysreg & co: Add support for op-like sysregs (e.g. TLBI)	2022-08-17 14:01:07 +09:00
reg_filter.py	tools/reg_filter.py: Decode trivial values into BIT()	2022-06-28 01:41:23 +09:00