mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-11-27 08:50:17 +00:00
45a62144ff
Currently, only some scripts in proxyclient/experiments and proxyclient/tools have their execute bit set. Set it for those that miss it. Signed-off-by: Jean-Marc Ranger <jmranger@hotmail.com>
150 lines
3.6 KiB
Python
Executable file
150 lines
3.6 KiB
Python
Executable file
#!/usr/bin/env python3
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# SPDX-License-Identifier: MIT
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import sys, pathlib, time
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sys.path.append(str(pathlib.Path(__file__).resolve().parents[1]))
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from m1n1.setup import *
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from m1n1 import asm
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LOOPS = 10000000
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freq = u.mrs(CNTFRQ_EL0)
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CREG = [
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0x210e00000,
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0x211e00000,
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]
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CLUSTER_PSTATE = 0x20020
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# e-core pstates
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# 600 972 1332 1704 2064
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# p-core pstates
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# 600 828 1056 1284 1500 1728 1956 2184 2388 2592 2772 2988 3096 3144 3204
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code = u.malloc(0x1000)
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util = asm.ARMAsm("""
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bench:
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mrs x1, CNTPCT_EL0
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1:
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sub x0, x0, #1
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cbnz x0, 1b
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mrs x2, CNTPCT_EL0
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sub x0, x2, x1
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ret
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""", code)
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iface.writemem(code, util.data)
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p.dc_cvau(code, len(util.data))
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p.ic_ivau(code, len(util.data))
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def bench_cpu(idx):
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if idx == 0:
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elapsed = p.call(util.bench, LOOPS) / freq
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else:
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elapsed = p.smp_call_sync(idx, util.bench, LOOPS) / freq
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if elapsed == 0:
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return 0
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mhz = (LOOPS / elapsed) / 1000000
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return mhz
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print()
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e_pstate = p.read64(CREG[0] + CLUSTER_PSTATE)
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p_pstate = p.read64(CREG[1] + CLUSTER_PSTATE)
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print(f"E-Core pstate: {e_pstate:x}")
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print(f"P-Core pstate: {p_pstate:x}")
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#for cluster in range(2):
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#print(f"Initializing cluster {cluster} (early)")
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#p.write64(CREG[cluster] + 0x20660, 0x1000000015)
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#p.write64(CREG[cluster] + 0x48000, 0)
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#p.write64(CREG[cluster] + 0x48080, 0xa000000000000000)
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#p.clear64(CREG[cluster] + CLUSTER_PSTATE, 1<<22)
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#p.set32(PMGR + 0x48000, 1)
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#p.set32(PMGR + 0x48c00, 1)
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#p.set32(PMGR + 0x48800, 1)
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#p.set32(PMGR + 0x48400, 1)
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CLUSTER_DVMR = 0x206b8
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CLUSTER_LIMIT2 = 0x40240
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CLUSTER_LIMIT3 = 0x40250
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CLUSTER_LIMIT1 = 0x48400
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PMGR_CPUGATING = 0x1c080
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CLUSTER_CTRL = 0x440f8
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CLUSTER_PSCTRL = 0x200f8
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for cluster in range(2):
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print(f"Initializing cluster {cluster}")
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ena = (1<<63)
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val = p.read64(CREG[cluster] + CLUSTER_DVMR)
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if cluster == 1:
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ena |= (1<<32) | (1<<31)
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if (val & ena) != ena:
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print(f"DVMR: {val:#x} -> {val|ena:#x}")
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p.set64(CREG[cluster] + CLUSTER_DVMR, ena) # CLUSTER_DVMR
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#p.set64(CREG[cluster] + CLUSTER_LIMIT1, 1<<63)
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#p.clear64(CREG[cluster] + CLUSTER_LIMIT2, 1<<63)
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#p.set64(CREG[cluster] + CLUSTER_LIMIT3, 1<<63)
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#p.set64(CREG[cluster] + CLUSTER_PSTATE, 0)
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#p.set32(PMGR + PMGR_CPUGATING + 8 * cluster, 1<<31)
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#p.write64(CREG[cluster] + CLUSTER_CTRL, 1)
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#p.set64(CREG[cluster] + CLUSTER_PSCTRL, 1<<40)
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#pstate = p.read64(CREG[cluster] + CLUSTER_PSTATE) & 0xf
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p.smp_start_secondaries()
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print("== Initial CPU frequencies ==")
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for cpu in range(8):
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print(f"CPU {cpu}: {bench_cpu(cpu):.2f} MHz")
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def set_pstate(cluster, pstate):
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# This really seems to be all that's needed
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p.mask64(CREG[cluster] + CLUSTER_PSTATE, 0xf00f, (1<<25) | pstate | (pstate << 12))
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# Optionally, adjust MCC performance in higher p-core pstates
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if cluster == 1:
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if pstate > 8:
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p0, p1 = 0x133, 0x55555340
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else:
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p0, p1 = 0x813057f, 0x1800180
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for lane in range(8):
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p.write32(0x200200dc4 + lane * 0x40000, p0)
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p.write32(0x200200dbc + lane * 0x40000, p1)
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# This seems to be about notifying PMP
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#p.write32(0x23b738004 + cluster*4, pstate)
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#p.write32(0x23bc34000, 1 << cluster)
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set_pstate(1, 15)
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e_pstate = p.read64(CREG[0] + CLUSTER_PSTATE)
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p_pstate = p.read64(CREG[1] + CLUSTER_PSTATE)
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print(f"E-Core pstate: {e_pstate:x}")
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print(f"P-Core pstate: {p_pstate:x}")
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time.sleep(0.5)
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print("== Final CPU frequencies ==")
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#elapsed = p.smp_call(7, util.bench, 80000000)
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for cpu in range(8):
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print(f"CPU {cpu}: {bench_cpu(cpu):.2f} MHz")
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#elapsed = p.smp_wait(7)
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