mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-11-10 09:44:13 +00:00
cecf51f245
Now uses the same devicetree source as the kernel, verbatim, with the required subset of kernel dt includes. Signed-off-by: Hector Martin <marcan@marcan.st>
135 lines
3.1 KiB
Text
135 lines
3.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR MIT
|
|
/*
|
|
* Apple T8103 "M1" SoC
|
|
*
|
|
* Other names: H13G, "Tonga"
|
|
*
|
|
* Copyright The Asahi Linux Contributors
|
|
*/
|
|
|
|
#include <dt-bindings/interrupt-controller/apple-aic.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
|
/ {
|
|
compatible = "apple,t8103", "apple,arm-platform";
|
|
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
cpus {
|
|
#address-cells = <2>;
|
|
#size-cells = <0>;
|
|
|
|
cpu0: cpu@0 {
|
|
compatible = "apple,icestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x0>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu1: cpu@1 {
|
|
compatible = "apple,icestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x1>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu2: cpu@2 {
|
|
compatible = "apple,icestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x2>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu3: cpu@3 {
|
|
compatible = "apple,icestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x3>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu4: cpu@10100 {
|
|
compatible = "apple,firestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x10100>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu5: cpu@10101 {
|
|
compatible = "apple,firestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x10101>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu6: cpu@10102 {
|
|
compatible = "apple,firestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x10102>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
|
|
cpu7: cpu@10103 {
|
|
compatible = "apple,firestorm";
|
|
device_type = "cpu";
|
|
reg = <0x0 0x10103>;
|
|
enable-method = "spin-table";
|
|
cpu-release-addr = <0 0>; /* To be filled by loader */
|
|
};
|
|
};
|
|
|
|
timer {
|
|
compatible = "arm,armv8-timer";
|
|
interrupt-parent = <&aic>;
|
|
interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
|
|
interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
|
|
<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
|
|
<AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
|
|
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
clk24: clock-24m {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <24000000>;
|
|
clock-output-names = "clk24";
|
|
};
|
|
|
|
soc {
|
|
compatible = "simple-bus";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
ranges;
|
|
nonposted-mmio;
|
|
|
|
aic: interrupt-controller@23b100000 {
|
|
compatible = "apple,t8103-aic", "apple,aic";
|
|
#interrupt-cells = <3>;
|
|
interrupt-controller;
|
|
reg = <0x2 0x3b100000 0x0 0x8000>;
|
|
};
|
|
|
|
serial0: serial@235200000 {
|
|
compatible = "apple,s5l-uart";
|
|
reg = <0x2 0x35200000 0x0 0x1000>;
|
|
reg-io-width = <4>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
|
|
/*
|
|
* TODO: figure out the clocking properly, there may
|
|
* be a third selectable clock.
|
|
*/
|
|
clocks = <&clk24>, <&clk24>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|