mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-12-25 04:43:04 +00:00
238 lines
4.5 KiB
ArmAsm
238 lines
4.5 KiB
ArmAsm
/* SPDX-License-Identifier: MIT */
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#include "cpu_regs.h"
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#define genter .long 0x00201420
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#define gexit .long 0x00201400
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.global gxf_init
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.type gxf_init, @function
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gxf_init:
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str x30, [sp, #-16]!
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mov x0, 1
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msr SYS_IMP_APL_SPRR_CONFIG_EL1, x0
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isb
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msr SYS_IMP_APL_GXF_CONFIG_EL1, x0
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isb
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ldr x0, =_gxf_setup
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msr SYS_IMP_APL_GXF_ENTER_EL1, x0
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isb
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genter
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msr SYS_IMP_APL_GXF_CONFIG_EL1, xzr
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isb
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msr SYS_IMP_APL_SPRR_CONFIG_EL1, xzr
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isb
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ldr x30, [sp], #16
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ret
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.globl gxf_enter
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.type gxf_enter, @function
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gxf_enter:
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genter
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ret
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_gxf_setup:
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ldr x0, =gl2_stack_base
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ldr x0, [x0]
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mov sp, x0
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ldr x1, =_gxf_vectors
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ldr x2, =_gxf_exc_sync
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ldr x3, =_gxf_entry
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msr SYS_IMP_APL_VBAR_GL1, x1
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msr SYS_IMP_APL_GXF_ABORT_EL1, x2
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msr SYS_IMP_APL_GXF_ENTER_EL1, x3
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mrs x4, CurrentEL
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cmp x4, #8
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bne 1f
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ldr x0, =gl1_stack_base
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ldr x0, [x0]
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msr SYS_IMP_APL_SP_GL12, x0
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msr SYS_IMP_APL_VBAR_GL12, x1
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msr SYS_IMP_APL_GXF_ABORT_EL12, x2
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msr SYS_IMP_APL_GXF_ENTER_EL12, x3
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1:
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isb
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gexit
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_gxf_entry:
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stp x29, x30, [sp, #-16]!
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stp x23, x24, [sp, #-16]!
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stp x21, x22, [sp, #-16]!
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stp x19, x20, [sp, #-16]!
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// these registers would be overwritten by each exception happening in GL1/2
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// but we need them to gexit correctly again
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mrs x20, SYS_IMP_APL_SPSR_GL1
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mrs x21, SYS_IMP_APL_ASPSR_GL1
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mrs x22, SYS_IMP_APL_ESR_GL1
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mrs x23, SYS_IMP_APL_ELR_GL1
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mrs x24, SYS_IMP_APL_FAR_GL1
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mov x5, x0
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mov x0, x1
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mov x1, x2
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mov x2, x3
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mov x3, x4
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blr x5
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msr SYS_IMP_APL_SPSR_GL1, x20
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msr SYS_IMP_APL_ASPSR_GL1, x21
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msr SYS_IMP_APL_ESR_GL1, x22
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msr SYS_IMP_APL_ELR_GL1, x23
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msr SYS_IMP_APL_FAR_GL1, x24
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ldp x19, x20, [sp], #16
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ldp x21, x22, [sp], #16
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ldp x23, x24, [sp], #16
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ldp x29, x30, [sp], #16
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isb
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gexit
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.align 11
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_gxf_vectors:
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mov x9, '0'
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b _gxf_exc_unk
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.align 7
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mov x9, '1'
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b _gxf_exc_unk
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.align 7
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mov x9, '2'
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b _gxf_exc_unk
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.align 7
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mov x9, '3'
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b _gxf_exc_unk
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.align 7
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b _gxf_exc_sync
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.align 7
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mov x9, '5'
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b _gxf_exc_unk
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.align 7
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mov x9, '6'
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b _gxf_exc_unk
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.align 7
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b _gxf_serr
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.align 7
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b _gxf_exc_sync
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.align 7
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mov x9, '9'
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b _gxf_exc_unk
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.align 7
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mov x9, 'a'
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b _gxf_exc_unk
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.align 7
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b _gxf_serr
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.align 7
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mov x9, 'c'
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b _gxf_exc_unk
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.align 7
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mov x9, 'd'
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b _gxf_exc_unk
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.align 7
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mov x9, 'e'
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b _gxf_exc_unk
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.align 7
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mov x9, 'f'
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b _gxf_exc_unk
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.align 7
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_gxf_exc_sync:
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str x30, [sp, #-16]!
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bl _gxf_exc_entry
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bl exc_sync
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b _gxf_exc_return
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_gxf_serr:
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str x30, [sp, #-16]!
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bl _gxf_exc_entry
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bl exc_serr
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b _gxf_exc_return
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_gxf_exc_entry:
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stp x28, x29, [sp, #-16]!
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stp x26, x27, [sp, #-16]!
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stp x24, x25, [sp, #-16]!
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stp x22, x23, [sp, #-16]!
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stp x20, x21, [sp, #-16]!
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stp x18, x19, [sp, #-16]!
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stp x16, x17, [sp, #-16]!
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stp x14, x15, [sp, #-16]!
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stp x12, x13, [sp, #-16]!
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stp x10, x11, [sp, #-16]!
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stp x8, x9, [sp, #-16]!
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stp x6, x7, [sp, #-16]!
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stp x4, x5, [sp, #-16]!
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stp x2, x3, [sp, #-16]!
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stp x0, x1, [sp, #-16]!
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mov x0, sp
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mrs x1, SYS_IMP_APL_SPSR_GL1
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msr SPSR_EL1, x1
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mrs x1, SYS_IMP_APL_ELR_GL1
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msr ELR_EL1, x1
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mrs x1, SYS_IMP_APL_ESR_GL1
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msr ESR_EL1, x1
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mrs x1, SYS_IMP_APL_FAR_GL1
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msr FAR_EL1, x1
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ret
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_gxf_exc_return:
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mrs x0, SPSR_EL1
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msr SYS_IMP_APL_SPSR_GL1, x0
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mrs x0, ELR_EL1
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msr SYS_IMP_APL_ELR_GL1, x0
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ldp x0, x1, [sp], #16
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ldp x2, x3, [sp], #16
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ldp x4, x5, [sp], #16
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ldp x6, x7, [sp], #16
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ldp x8, x9, [sp], #16
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ldp x10, x11, [sp], #16
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ldp x12, x13, [sp], #16
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ldp x14, x15, [sp], #16
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ldp x16, x17, [sp], #16
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ldp x18, x19, [sp], #16
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ldp x20, x21, [sp], #16
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ldp x22, x23, [sp], #16
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ldp x24, x25, [sp], #16
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ldp x26, x27, [sp], #16
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ldp x28, x29, [sp], #16
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ldr x30, [sp], #16
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isb
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gexit
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_gxf_exc_unk:
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mov w0, 0xd /* '\r', clang compat */
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bl debug_putc
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mov w0, '\n'
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bl debug_putc
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mov w0, '!'
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bl debug_putc
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mov w0, 'G'
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bl debug_putc
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mov w0, 'L'
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bl debug_putc
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mov w0, 'E'
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bl debug_putc
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mov w0, 'X'
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bl debug_putc
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mov w0, 'C'
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bl debug_putc
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mov w0, ':'
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bl debug_putc
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mov w0, w9
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bl debug_putc
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mov w0, '!'
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bl debug_putc
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mov w0, 0xd /* '\r', clang compat */
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bl debug_putc
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mov w0, '\n'
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bl debug_putc
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b reboot
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