mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-12-04 03:49:10 +00:00
99 lines
2.7 KiB
C
99 lines
2.7 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "cpu_regs.h"
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#include "exception.h"
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#include "gxf.h"
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#include "memory.h"
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#include "smp.h"
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#include "uart.h"
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#include "utils.h"
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uint64_t gxf_enter(void *func, uint64_t a, uint64_t b, uint64_t c, uint64_t d);
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u8 gl1_stack[MAX_CPUS][GL_STACK_SIZE] ALIGNED(0x4000);
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u8 gl2_stack[MAX_CPUS][GL_STACK_SIZE] ALIGNED(0x4000);
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bool gxf_enabled(void)
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{
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if (!(mrs(SYS_IMP_APL_SPRR_CONFIG_EL1) & SPRR_CONFIG_EN))
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return false;
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return (mrs(SYS_IMP_APL_GXF_CONFIG_EL1) & GXF_CONFIG_EN);
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}
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bool in_gl12(void)
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{
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if (!gxf_enabled())
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return false;
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return (mrs(SYS_IMP_APL_GXF_STATUS_EL1) & GXF_STATUS_GUARDED);
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}
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static uint64_t gl_call(void *func, uint64_t a, uint64_t b, uint64_t c, uint64_t d)
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{
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// disable the MMU first since enabling SPRR will change the meaning of all
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// pagetable permission bits and also prevent us from having rwx pages
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u64 sprr_state = mrs(SYS_IMP_APL_SPRR_CONFIG_EL1);
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if (!(sprr_state & SPRR_CONFIG_EN))
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reg_set_sync(SYS_IMP_APL_SPRR_CONFIG_EL1, sprr_state | SPRR_CONFIG_EN);
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u64 gxf_state = mrs(SYS_IMP_APL_GXF_CONFIG_EL1);
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if (!(gxf_state & GXF_CONFIG_EN))
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reg_set_sync(SYS_IMP_APL_GXF_CONFIG_EL1, gxf_state | GXF_CONFIG_EN);
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uint64_t ret = gxf_enter(func, a, b, c, d);
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if (!(gxf_state & GXF_CONFIG_EN))
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msr_sync(SYS_IMP_APL_GXF_CONFIG_EL1, gxf_state);
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if (!(sprr_state & SPRR_CONFIG_EN))
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msr_sync(SYS_IMP_APL_SPRR_CONFIG_EL1, sprr_state);
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return ret;
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}
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uint64_t gl2_call(void *func, uint64_t a, uint64_t b, uint64_t c, uint64_t d)
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{
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if (mrs(CurrentEL) != 0x8)
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return -1;
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return gl_call(func, a, b, c, d);
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}
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struct gl_call_argv {
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void *func;
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uint64_t a, b, c, d;
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};
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static uint64_t gl_call_wrapper(struct gl_call_argv *args)
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{
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return gl_call(args->func, args->a, args->b, args->c, args->d);
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}
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uint64_t gl1_call(void *func, uint64_t a, uint64_t b, uint64_t c, uint64_t d)
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{
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if (mrs(CurrentEL) == 0x4)
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return gl_call(func, a, b, c, d);
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struct gl_call_argv args;
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args.func = func;
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args.a = a;
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args.b = b;
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args.c = c;
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args.d = d;
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// enable EL1 here since once GXF has been enabled HCR_EL2 writes are only possible from GL2
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if (mrs(HCR_EL2) & HCR_TGE)
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reg_clr(HCR_EL2, HCR_TGE);
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u64 sprr_state = mrs(SYS_IMP_APL_SPRR_CONFIG_EL1) & SPRR_CONFIG_EN;
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reg_set_sync(SYS_IMP_APL_SPRR_CONFIG_EL1, SPRR_CONFIG_EN);
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u64 gxf_state = mrs(SYS_IMP_APL_GXF_CONFIG_EL1) & GXF_CONFIG_EN;
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reg_set_sync(SYS_IMP_APL_GXF_CONFIG_EL1, GXF_CONFIG_EN);
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uint64_t ret = el1_call(gl_call_wrapper, (uint64_t)&args, 0, 0, 0);
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msr_sync(SYS_IMP_APL_GXF_CONFIG_EL1, gxf_state);
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msr_sync(SYS_IMP_APL_SPRR_CONFIG_EL1, sprr_state);
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return ret;
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}
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