mirror of
https://github.com/AsahiLinux/m1n1
synced 2024-11-15 03:37:06 +00:00
119 lines
4.1 KiB
Python
Executable file
119 lines
4.1 KiB
Python
Executable file
#!/usr/bin/env python3
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# SPDX-License-Identifier: MIT
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import sys, pathlib
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sys.path.append(str(pathlib.Path(__file__).resolve().parents[1]))
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from m1n1 import adt
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from m1n1.setup import *
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dt = u.adt
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pmgr = dt["/arm-io/pmgr"]
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dev_by_id = {dev.id: dev for dev in pmgr.devices}
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pd_by_id = {pd.id: pd for pd in pmgr.power_domains}
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clk_by_id = {clk.id: clk for clk in pmgr.clocks}
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print("=== PS Regs ===")
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for i, r in enumerate(pmgr.ps_regs):
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print(f" #{i:2d} reg: {r.reg} off: {r.offset:05x} mask:{r.mask:08x}")
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print()
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print("=== PWR Gate Regs ===")
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for i, r in enumerate(pmgr.pwrgate_regs):
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print(f" #{i:2d} reg: {r.reg} off: {r.offset:05x} mask:{r.mask:08x} unk:{r.unk:08x}")
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clock_users = {}
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dev_users = {}
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for dev in dt["/arm-io"]:
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if hasattr(dev, "clock_ids") and dev.clock_ids:
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for i, clk in enumerate(dev.clock_ids):
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clock_users.setdefault(clk, []).append(f"{dev._path}.clk[{i}]")
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if hasattr(dev, "clock_gates") and dev.clock_gates:
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for i, pdev in enumerate(dev.clock_gates):
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dev_users.setdefault(pdev, []).append(f"{dev._path}.clkgate[{i}]")
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if hasattr(dev, "power_gates") and dev.power_gates:
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for i, pdev in enumerate(dev.power_gates):
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dev_users.setdefault(pdev, []).append(f"{dev._path}.pwrgate[{i}]")
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print()
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print("=== Devices ===")
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for i, dev in enumerate(pmgr.devices):
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ps = pmgr.ps_regs[dev.psreg]
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HAS_CTL = 0x20
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NO_PS = 0x10
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flags = "".join(j if dev.flags & (1 << (7-i)) else " " for i,j in enumerate("abCdefgh"))
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s = f" #{i:3d} {dev.name:20s} id: {dev.id:3d} psreg: {dev.psreg:2d}:{dev.psidx:2d} "
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s += f" flags:{flags} unk1_0: {dev.unk1_0} unk1_1: {dev.unk1_1} "
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s += f" ctl_reg: {dev.ctl_block}:{dev.ctl_idx:#04x} unk3: {dev.unk3:3d} {dev.unk2_0:2d} {dev.ps_cfg16:2d} {dev.unk2_3:3d}"
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if dev.psidx or dev.psreg:
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addr = pmgr.get_reg(ps.reg)[0] + ps.offset + dev.psidx * 8
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val = p.read32(addr)
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s += f" @ {addr:#x} = {val:#010x}"
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else:
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s += f" @ "
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if dev.pd:
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pd = pd_by_id[dev.pd]
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s += f" pd: {pd.name:20s}"
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else:
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s += " "
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if any(dev.parents):
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s += " parents: " + ", ".join(dev_by_id[idx].name if idx in dev_by_id else f"#{idx}" for idx in dev.parents if idx)
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print(s)
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for i in dev_users.get(dev.id, []):
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print(f" User: {i}")
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cfg_bases = [
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pmgr.get_reg(1)[0] + 0x34100, # TODO:check
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pmgr.get_reg(0)[0] + 0x34100,
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pmgr.get_reg(0)[0] + 0x7c100,
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pmgr.get_reg(0)[0] + 0x78100,
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]
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print()
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print("=== Clocks ===")
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for i, clk in enumerate(pmgr.clocks):
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reg = cfg_bases[clk.ctl_block] + clk.ctl_idx * 0x10
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print(f" #{i:3d} {clk.name:20s} id: {clk.id:3d} reg:{clk.ctl_block}:{clk.ctl_idx:#4x} ({reg:#x}) {clk.unk:#x}")
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print()
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print("=== Power Domains ===")
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for i, pd in enumerate(pmgr.power_domains):
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reg = cfg_bases[pd.ctl_block] + pd.ctl_idx * 0x10
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print(f" #{i:3d} {pd.name:20s} id: {pd.id:3d} reg:{pd.ctl_block}:{pd.ctl_idx:#4x} ({reg:#x})")
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print()
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print("=== Events ===")
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for i, ev in enumerate(pmgr.events):
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reg = cfg_bases[ev.ctl_block] + ev.ctl_idx * 0x10
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v = f" #{i:3d} {ev.name:20s} unk:{ev.unk1:#3x}/{ev.unk2}/{ev.unk3} id: {ev.id:3d} reg:{ev.ctl_block}:{ev.ctl_idx:#4x} ({reg:#x})"
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if ev.ctl2_idx:
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reg2 = cfg_bases[ev.ctl2_block] + ev.ctl2_idx * 0x10
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v += f" reg2:{ev.ctl2_block}:{ev.ctl2_idx:#4x} ({reg2:#x})"
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print(v)
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arm_io = dt["/arm-io"]
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print()
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print("=== Boot clocks ===")
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for i, (freq, reg, nclk) in enumerate(zip(arm_io.clock_frequencies,
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arm_io.clock_frequencies_regs,
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arm_io.clock_frequencies_nclk)):
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v = ""
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clk_type = reg >> 56
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reg = reg & 0xFFFFFFFFFFFFFF
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if clk_type == 0x9c:
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v = f"fixed: {reg}"
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elif clk_type in (0xa0, 0xa1, 0xa4, 0xa5):
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v = f"regval: {p.read32(reg):#x}"
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elif clk_type == 0xa8:
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v = "nco: "
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for off in range(6):
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v += f"{p.read32(reg+off*4):#x} "
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print(f"#{i:3}: {freq:10d} {nclk} {clk_type:#x}/{reg:#x}: {v}")
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for j in clock_users.get(i + 256, []):
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print(f" User: {j}")
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