Commit graph

278 commits

Author SHA1 Message Date
Hector Martin
9407dba2e0 hv_vm: Initial data abort handling
Supports software-mapping for a subset of ldr/str instructions.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 04:03:44 +09:00
Hector Martin
8a64441bcd hv_vm: Extend hv_translate() for stage1 and write modes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:27:19 +09:00
Hector Martin
c0c7c57dd0 hv_vm: Fix bug inhv_pt_map_l4()
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:24:37 +09:00
Hector Martin
ce3a673413 uart: Move registers to uart_regs.h
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:23:25 +09:00
Hector Martin
27af846aae hv_vm.c: Move SPTE_TYPE to bit 50
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:23:04 +09:00
Hector Martin
0e987f031b utils: Add flush_and_reboot() to do the iodev flush dance
Use this for exceptions, asserts, etc.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:21:48 +09:00
Hector Martin
76b690e767 hv.py: Make ^D exit the hypervisor, not cont
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:46:53 +09:00
Hector Martin
4b3f527de9 proxyutils: Disassemble faulting code on exceptions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:46:48 +09:00
Hector Martin
652c7e27a1 proxyutils.py: u.inst -> u.exec and support assembly
Also refactor mrs/msr in terms of u.exec.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
50f112c396 hv: Add support for address translation & abort decoding
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
a3440f2b48 hv: Support cleanly exiting the hypervisor from an exception
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
d35fa5e0fc iodev: Add iodev_console_kick()
This is used prior to rebooting in exception handlers, to make sure all
the exception dump data gets sent to USB if we are connected via that.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
5ad0bdf994 sysreg: Fix ESR_ISS_MSR.CRm field bounds
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 23:01:55 +09:00
Hector Martin
78895edf2c hv.py: Properly copy ADT and TrustCache into guest region
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 22:57:08 +09:00
Hector Martin
954408cc65 chainload: Support old-school call based chainloading
This is useful in the middle of the HV exception handler to reboot m1n1
entirely, since we can't do a clean exit the way we would for normal
chainloading.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 22:56:47 +09:00
Hector Martin
826bdb709c sysreg.py: Correct SPSR definition for AArch64 mode
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 20:05:54 +09:00
Hector Martin
4d64c33ca6 hv: Implement basic exception handling
Allows Python to handle hypervisor exceptions, and implements exception
info display and basic debug commands.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:36:23 +09:00
Hector Martin
b015dcf272 shell.py: Make usable as a module
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:35:19 +09:00
Hector Martin
315fcf36aa uartproxy: Add support for nested invocations
This allows the proxy to call back to Python for handling exceptions or
other events, passing reason information about why it was invoked and
returning normally when the exception has been handled.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:34:08 +09:00
Hector Martin
38b716c33c hv.py: Do not fail if ADT was already mutated
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:32:18 +09:00
Hector Martin
23c723003f sysreg.py: Move sysreg definitions here from proxyutils
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:31:41 +09:00
Hector Martin
35d564801a utils.py: Add Register class to handle register fields
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:26:41 +09:00
Hector Martin
4cc0f45c9d arm_cpu_regs.h: Add SYS_ESR_EL2
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:25:46 +09:00
Hector Martin
785dba33ad exception_asm: Fix missing register restores
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:24:52 +09:00
Hector Martin
a326aca956 hv: Enable physical timer for EL1 properly
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:23:35 +09:00
Hector Martin
23304719cd hv: Move VM code to hv_vm.c
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 15:38:17 +09:00
Hector Martin
2df4654555 hv.py: Disable secondary CPUs for now
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 01:52:58 +09:00
Hector Martin
95542a4619 kboot: Handle missing CPUs properly
This is necessary to boot Linux in UP mode if we're in EL1 and the HV
does not support SMP yet.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 01:52:58 +09:00
Hector Martin
948e507031 hv: Update ADT to fix SEPFW address and disable HV USB
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-03 21:30:30 +09:00
Hector Martin
9584e7d312 uartproxy: Add IODEV_WHOAMI feature to get current iodev
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-03 21:19:35 +09:00
Hector Martin
a3e50e8f44 proxy.py: Use the enum module for GUARD_/USAGE_/IODEV_
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-03 21:19:35 +09:00
Hector Martin
ec9221cf32 adt.py: Support serializing back to binary ADT
This should losslessly round-trip

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-03 21:19:15 +09:00
Hector Martin
7d18e8afb9 hv.py: Add missing file
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-03 21:18:57 +09:00
Hector Martin
1ae60ad715 hv: Beginnings of a hypervisor
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:21:33 +09:00
Hector Martin
1ff5b82aab iodev/usb: Do not crash if USB was not initialized
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:04:38 +09:00
Hector Martin
4547773edf setup.py: Remove unnecessary imports
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:04:01 +09:00
Hector Martin
63366e43d2 proxy.py: Fix typo
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:03:46 +09:00
Hector Martin
5fdeb1c3e3 chainload.py: Remove useless import
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:03:21 +09:00
Hector Martin
68156fd806 utils.h: Add alignment and field macros
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:02:49 +09:00
Hector Martin
8b1ea3f04d proxyutils: Make heap size configurable
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:02:25 +09:00
Hector Martin
2a1a04ea0d setup.py: Move baudrate auto setup to proxyutils
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 19:02:20 +09:00
Hector Martin
26c4ab3888 formatting: Sort main include first
clang-format is supposed to do this, but for some reason it's "sticky"
and doesn't...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 18:31:58 +09:00
Hector Martin
45a0054f63 Add build-time printf() argument checking and fix warnings
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 18:23:44 +09:00
Hector Martin
7c2dace0b0 chainload.py: Cleanup, move Mach-O loader to macho.py
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:16:02 +09:00
Hector Martin
a489a646bd Add tools for ARM sysreg database management
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:14:35 +09:00
Hector Martin
7bb490eb58 utils.py: New file for misc util functions (non proxy)
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:13:29 +09:00
Hector Martin
aaf4b2785b Rename utils.py -> proxyutils.py
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:13:06 +09:00
Hector Martin
882610b50e cpu_regs.h: s/SYS_APL/SYS_IMP_APL/ to match Linux
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-04-29 15:45:44 +09:00
Hector Martin
fcd103b2a4 proxy.py: Reopen port on reboot if necessary
This is needed for USB mode, as the device re-enumerates after a reboot.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-04-27 19:49:59 +09:00
Hector Martin
80f73926e8 proxy.py: Move M1N1DEVICE/UART port open logic into UartInterface
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-04-27 19:49:59 +09:00