Commit graph

160 commits

Author SHA1 Message Date
Hector Martin
757213b7a9 apple_regs.json: Add some EL1 registers for AP
Still not sure how to enable APSTS_EL12...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-13 20:10:34 +09:00
Hector Martin
98839afab0 proxyutils.py: Use keyword-only arguments for msr/msr/inst
So I stop writing mrs(sysreg, value)...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-13 19:02:57 +09:00
Hector Martin
aebda5213a hv.py: Now gets pretty far into XNU boot
Next up: mmiotrace

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-13 19:02:35 +09:00
Hector Martin
495732ef6a proxyutils.py: Fix returning from ad-hoc code
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-13 18:16:13 +09:00
Hector Martin
7fb35a8533 proxyutils.py: Call ad-hoc code in RX EL1 region
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-13 18:15:35 +09:00
Hector Martin
4a918346a8 shell.py: Add only callables to locals, but also sysregs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:21:39 +09:00
Hector Martin
4d75ff90ff proxyutils.py: Support Apple impdef MSR trap decoding
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:21:09 +09:00
Hector Martin
f56318abc9 hacr_trap_bits.py: Look at ARM standard-but-not regs too
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:20:51 +09:00
Hector Martin
9268f83f9f sysreg.py: Define bitfields for more Apple regs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:20:06 +09:00
Hector Martin
5bea278509 sysreg.py: Add sysreg_name() helper
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:19:50 +09:00
Hector Martin
a519af2ca8 proxyutils.py: Add support for symbolizing addresses
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:19:19 +09:00
Hector Martin
90872f460e macho.py: Support loading and importing symbol files
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:18:12 +09:00
Hector Martin
db9acba268 utils.py: Register: Initialize to 0
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:17:38 +09:00
Hector Martin
51bafa3c3f proxyutils.py: Fix silent arg for mrs/msr
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:17:09 +09:00
Hector Martin
ec5388d6b5 chainload.py: Support SMP when loading XNU
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:16:33 +09:00
Hector Martin
4e545d0513 adt.py: Improve parsing of reg/ranges & add resolver
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-12 21:16:15 +09:00
Sven Peter
e58c264a07 gxf: add SPRR/GXF proxyclient experiments
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-05-11 15:48:40 +09:00
Sven Peter
34123e33d8 proxyutils: added GuardedHeap
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-05-11 15:48:40 +09:00
Sven Peter
1c604a77c5 gxf: add support for guarded exception levels
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-05-11 15:48:40 +09:00
Sven Peter
2c5b202c99 sysreg: add support for Apple's custom sysregs
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-05-11 15:48:40 +09:00
Sven Peter
9120cb8426 memory: allow to reinit and temporarily disable the MMU
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-05-11 15:48:40 +09:00
Hector Martin
9a7a5c86a5 hv.py: Map only from guest base to RAM top to guest
This keeps the hypervisor safe, in theory.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
a6287ae68d proxy.py: Add defaults to hv_translate flag args
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
19415bd6a5 run_guest.py: Support setting boot_args
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
3fecf181f9 proxyutils.py: Only decode abort/msr info for SYNC exceptions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
9bfe278f52 proxyutils.py: Add disassemble_at() method
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
e3d7e569dc sysreg.py: Define an impdef EC code that Apple seems to use
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
6ad3b263a1 macho.py: Add support for loaded section hooks for patching
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
ed32cf6328 hv_exc: Add a hacky STEP feature to interrupt guest after a while
This should eventually be a proper single step feature or something, but
for now...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
aadf54d86f proxy.py: Add missing FB defines
Also fix some calls

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-09 03:25:51 +09:00
Hector Martin
f58a9774d2 hv.py: Shut down fb before entering guest
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 03:43:59 +09:00
Hector Martin
0203aa6d3d proxy: Add framebuffer ops
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 03:42:21 +09:00
Hector Martin
8a8a004d48 hv.py: Correctly declare BootArgs in ADT memory map
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 02:40:57 +09:00
Hector Martin
530069bbfa proxyutils.py: Switch to gzip compression for writemem_compressed
lzma is too slow, not worth the gain now that we have USB.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 02:40:13 +09:00
Hector Martin
36a6c9de3e proxy.py: Correctly indicate USB reconnection timeout
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 02:39:56 +09:00
Hector Martin
adb91b4374 chainload.py: Add support for setting boot-args
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-08 02:39:32 +09:00
Hector Martin
c6965acc75 adt.py: Fix typo
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-06 23:36:29 +09:00
Hector Martin
f1cc65f6c0 chainload.py: Set up SEPFW address in ADT
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-06 03:33:35 +09:00
Hector Martin
bbbea9db34 proxyutils: Disable serial timeout for writemem_compressed
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-06 03:32:39 +09:00
Hector Martin
0ae3455d51 hv_vuart: World's stupidest virtual UART implementation
Work in progress...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 04:03:44 +09:00
Hector Martin
9407dba2e0 hv_vm: Initial data abort handling
Supports software-mapping for a subset of ldr/str instructions.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 04:03:44 +09:00
Hector Martin
8a64441bcd hv_vm: Extend hv_translate() for stage1 and write modes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:27:19 +09:00
Hector Martin
27af846aae hv_vm.c: Move SPTE_TYPE to bit 50
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 03:23:04 +09:00
Hector Martin
76b690e767 hv.py: Make ^D exit the hypervisor, not cont
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:46:53 +09:00
Hector Martin
4b3f527de9 proxyutils: Disassemble faulting code on exceptions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:46:48 +09:00
Hector Martin
652c7e27a1 proxyutils.py: u.inst -> u.exec and support assembly
Also refactor mrs/msr in terms of u.exec.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
50f112c396 hv: Add support for address translation & abort decoding
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
a3440f2b48 hv: Support cleanly exiting the hypervisor from an exception
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-05 00:28:39 +09:00
Hector Martin
5ad0bdf994 sysreg: Fix ESR_ISS_MSR.CRm field bounds
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 23:01:55 +09:00
Hector Martin
78895edf2c hv.py: Properly copy ADT and TrustCache into guest region
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 22:57:08 +09:00