Commit graph

19 commits

Author SHA1 Message Date
Hector Martin
35d564801a utils.py: Add Register class to handle register fields
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-04 19:26:41 +09:00
Hector Martin
7bb490eb58 utils.py: New file for misc util functions (non proxy)
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:13:29 +09:00
Hector Martin
aaf4b2785b Rename utils.py -> proxyutils.py
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-01 15:13:06 +09:00
Hector Martin
ce79483165 proxy: Add support for passing buffer/string values to reqs
This only works if the utils class has been instantiated, which is a bit
of a hack.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-04-15 23:18:57 +09:00
Hector Martin
70f6bc7514 linux.py: support up to 512MB kernels
Some people apparently have the patience to load KASAN kernels over
serial :-)

Also bump the python-managed heap to 1GB.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-03-08 01:33:43 +09:00
Hector Martin
0f2be2c0ee utils.py: unbork inst()
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-03-01 01:45:39 +09:00
Hector Martin
d918b066b6 utils.py: add silent and call arguments to msr/mrs
call allows the caller to override the function used for the function
call, e.g. to use EL0.

Use silent=True for find_all_regs.py

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-25 00:30:58 +09:00
Hector Martin
65824016b7 utils.py add silent argument to inst() 2021-02-24 19:01:17 +09:00
Sven Peter
fa02cc9602 utils.py: add compressed writemem
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2021-02-20 01:29:46 +09:00
Hector Martin
b7d30250b2 utils: allow inst() to return r0 and take args
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-19 03:25:28 +09:00
Hector Martin
c1b9ef89b5 utils.py: guard mrs/msr/etc
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-11 00:55:59 +09:00
Hector Martin
7d3dd54441 utils.py: replace manual reg list with a full dump
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-11 00:55:59 +09:00
Hector Martin
d12ac86448 utils.py: add more timer registers
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-06 16:44:10 +09:00
Hector Martin
5970824491 utils.py: add more ID registers
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-05 02:58:08 +09:00
Hector Martin
986c6730e9 Add heapblock and dlmalloc for managing memory
heapblock is a simple `sbrk` style implementation, also useful as an
"endless" decompression buffer. dlmalloc is used on top as a malloc
implementation.

This also changes how the Python side manages its heap. We still use a
python-side malloc implementation (since this is faster), and we put the
Python heap at the m1n1 heap + 128MB, without allocating it.
Hopefully this should never step on anything m1n1 neads, and avoids
having to manage freeing across Python script calls.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-29 16:25:15 +09:00
Hector Martin
08763968ac malloc.py: add memalign
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 16:06:12 +09:00
Hector Martin
e5caf91d79 utils: add u.inst() to run arbitrary instructions
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-23 22:43:21 +09:00
Hector Martin
99fb647a9b utils.py: add more ARM registers
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-23 22:43:19 +09:00
Hector Martin
397bfa17c6 proxyclient: new asm/malloc/utils, clean up
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-17 00:50:34 +09:00