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hv: Use AFSR_GL1 when in guarded mode.

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Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2021-05-30 03:29:52 +09:00
parent cd5a00ec87
commit f1cfe27e31
8 changed files with 19 additions and 2 deletions
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2
proxyclient/hv.py
View file

@ -261,7 +261,7 @@ class HV:
def handle_impdef(self, ctx):
if ctx.esr.ISS == 0x20:
return self.handle_msr(ctx, self.u.mrs(AFSR1_EL1))
return self.handle_msr(ctx, ctx.afsr1)
start = ctx.elr_phys
code = struct.unpack("<I", self.iface.readmem(ctx.elr_phys, 4))

1
proxyclient/proxy.py
View file

@ -114,6 +114,7 @@ ExcInfo = Struct(
"elr" / Int64ul,
"esr" / RegAdapter(ESR),
"far" / Int64ul,
"afsr1" / Int64ul,
"regs" / Array(31, Int64ul),
"sp" / Array(3, Int64ul),
"mpidr" / Int64ul,

2
src/cpu_regs.h
View file

@ -163,6 +163,8 @@
#define SYS_IMP_APL_VBAR_GL12 sys_reg(3, 6, 15, 9, 2)
#define SYS_IMP_APL_SP_GL12 sys_reg(3, 6, 15, 10, 0)
#define SYS_IMP_APL_AFSR1_GL1 sys_reg(3, 6, 15, 0, 1)
/* VM registers */
#define SYS_IMP_APL_VM_TMR_FIQ_ENA_EL2 sys_reg(3, 5, 15, 1, 3)
#define VM_TMR_FIQ_ENA_ENA_V BIT(0)

8
src/hv.c
View file

@ -108,6 +108,14 @@ u64 hv_get_far(void)
return mrs(FAR_EL2);
}
u64 hv_get_afsr1(void)
{
if (in_gl12())
return mrs(SYS_IMP_APL_AFSR1_GL1);
else
return mrs(AFSR1_EL2);
}
u64 hv_get_elr(void)
{
if (in_gl12())

1
src/hv.h
View file

@ -70,6 +70,7 @@ void hv_set_spsr(u64 val);
u64 hv_get_esr(void);
u64 hv_get_far(void);
u64 hv_get_elr(void);
u64 hv_get_afsr1(void);
void hv_set_elr(u64 val);
/* HV main */

3
src/hv_exc.c
View file

@ -32,6 +32,7 @@ void hv_exc_proxy(u64 *regs, uartproxy_boot_reason_t reason, uartproxy_exc_code_
.elr = hv_get_elr(),
.esr = hv_get_esr(),
.far = hv_get_far(),
.afsr1 = hv_get_afsr1(),
.sp = {mrs(SP_EL0), mrs(SP_EL1), 0},
.mpidr = mrs(MPIDR_EL1),
.elr_phys = hv_translate(hv_get_elr(), false, false),
@ -188,7 +189,7 @@ void hv_exc_sync(u64 *regs)
hv_wdt_breadcrumb('A');
switch (FIELD_GET(ESR_ISS, esr)) {
case ESR_ISS_IMPDEF_MSR:
handled = hv_handle_msr(regs, mrs(AFSR1_EL1));
handled = hv_handle_msr(regs, hv_get_afsr1());
break;
}
break;

1
src/uartproxy.h
View file

@ -37,6 +37,7 @@ struct uartproxy_exc_info {
u64 elr;
u64 esr;
u64 far;
u64 afsr1;
u64 regs[31];
u64 sp[3];
u64 mpidr;

3
tools/apple_regs.json
View file

@ -112,6 +112,9 @@
{"index": 0, "name": "ACC_OVRD_EL1", "fullname": "Apple Core Cluster Override", "enc": [3, 5, 15, 6, 0 ], "width": 64},
{"index": 0, "name": "ACC_EBLK_OVRD_EL1", "fullname": "Apple Core Cluster E-Block Override", "enc": [3, 5, 15, 6, 1 ], "width": 64},
{"index": 0, "name": "MMU_ERR_STS_EL1", "fullname": "MMU Error Status", "enc": [3, 6, 15, 0, 0 ], "width": 64},
{"index": 0, "name": "AFSR1_GL1", "fullname": "Auxiliary Fault Status Register 1 (GL1)", "enc": [3, 6, 15, 0, 1 ], "width": 64},
{"index": 0, "name": "AFSR1_GL2", "fullname": "Auxiliary Fault Status Register 1 (GL2)", "enc": [3, 6, 15, 0, 2 ], "width": 64},
{"index": 0, "name": "AFSR1_GL12", "fullname": "Auxiliary Fault Status Register 1 (GL12)", "enc": [3, 6, 15, 0, 3 ], "width": 64},
{"index": 0, "name": "SPRR_CONFIG_EL1", "fullname": "SPRR Configuration Register (EL1)", "enc": [3, 6, 15, 1, 0 ], "width": 64,
"fieldsets": [{"fields": [
{"name": "EN", "msb": 0, "lsb": 0},