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Spelling fixes

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Correct misspellings identified by the check-spelling action.

Signed-off-by: Josh Soref <jsoref@gmail.com>
This commit is contained in:
Josh Soref 2023-12-13 16:38:44 +09:00 committed by Hector Martin
parent c11a012697
commit e52eaf4f43
22 changed files with 55 additions and 55 deletions
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2
proxyclient/experiments/prores.py
View file

@ -593,7 +593,7 @@ desc = EncodeNotRawDescriptor(
unk_pad_0x5a_=b'\x00', unk_pad_0x5a_=b'\x00',
bitstream_version=0, bitstream_version=0,
encoder_identifier=0xcafeface, encoder_identifier=0xcafeface,
# cannot change arbitrily, will break # cannot change arbitrarily, will break
pix_surface_w_byteswap_=bswp16(im_W), pix_surface_w_byteswap_=bswp16(im_W),
pix_surface_h_byteswap_=bswp16(im_H), pix_surface_h_byteswap_=bswp16(im_H),
# seemingly can change arbitrarily # seemingly can change arbitrarily

2
proxyclient/hv/trace_gpio.py
View file

@ -4,7 +4,7 @@ from m1n1.trace.gpio import GPIOTracer
#trace_device("/arm-io/gpio", True) #trace_device("/arm-io/gpio", True)
# trace gpio interrups, useful to follow the cascaded interrupts # trace gpio interrupts, useful to follow the cascaded interrupts
aic_phandle = getattr(hv.adt["/arm-io/aic"], "AAPL,phandle") aic_phandle = getattr(hv.adt["/arm-io/aic"], "AAPL,phandle")
try: try:
node = hv.adt["/arm-io/gpio0"] node = hv.adt["/arm-io/gpio0"]

22
proxyclient/m1n1/constructutils.py
View file

@ -14,7 +14,7 @@ g_depth = 0
def ZPadding(size): def ZPadding(size):
return Const(bytes(size), Bytes(size)) return Const(bytes(size), Bytes(size))
def recusive_reload(obj, token=None): def recursive_reload(obj, token=None):
global g_depth global g_depth
if token is None: if token is None:
@ -36,7 +36,7 @@ def recusive_reload(obj, token=None):
obj.subcon = obj.subcon._reloadcls(token=token) obj.subcon = obj.subcon._reloadcls(token=token)
else: else:
if isinstance(obj.subcon, Construct): if isinstance(obj.subcon, Construct):
recusive_reload(obj.subcon, token) recursive_reload(obj.subcon, token)
if isinstance(obj, Construct) and hasattr(obj, 'subcons'): if isinstance(obj, Construct) and hasattr(obj, 'subcons'):
# Construct types that have lists # Construct types that have lists
new_subcons = [] new_subcons = []
@ -47,7 +47,7 @@ def recusive_reload(obj, token=None):
item = item._reloadcls() item = item._reloadcls()
else: else:
if isinstance(item, Construct): if isinstance(item, Construct):
recusive_reload(item, token) recursive_reload(item, token)
new_subcons.append(item) new_subcons.append(item)
obj.subcons = new_subcons obj.subcons = new_subcons
@ -60,7 +60,7 @@ def recusive_reload(obj, token=None):
obj.cases[i] = item._reloadcls(token=token) obj.cases[i] = item._reloadcls(token=token)
else: else:
if isinstance(item, Construct): if isinstance(item, Construct):
recusive_reload(item, token) recursive_reload(item, token)
for field in dir(obj): for field in dir(obj):
value = getattr(obj, field) value = getattr(obj, field)
@ -70,7 +70,7 @@ def recusive_reload(obj, token=None):
setattr(obj, field, value._reloadcls(token=token)) setattr(obj, field, value._reloadcls(token=token))
else: else:
if isinstance(value, Construct): if isinstance(value, Construct):
recusive_reload(value, token) recursive_reload(value, token)
obj._token = token obj._token = token
@ -140,7 +140,7 @@ class ConstructClassException(Exception):
pass pass
# We need to inherrit Construct as a metaclass so things like If and Select will work # We need to inherit Construct as a metaclass so things like If and Select will work
class ReloadableConstructMeta(ReloadableMeta, Construct): class ReloadableConstructMeta(ReloadableMeta, Construct):
def __new__(cls, name, bases, attrs): def __new__(cls, name, bases, attrs):
@ -187,9 +187,9 @@ class ReloadableConstructMeta(ReloadableMeta, Construct):
return cls return cls
class ConstructClassBase(Reloadable, metaclass=ReloadableConstructMeta): class ConstructClassBase(Reloadable, metaclass=ReloadableConstructMeta):
""" Offers two benifits over regular construct """ Offers two benefits over regular construct
1. It's reloadable, and can recusrivly reload other refrenced ConstructClasses 1. It's reloadable, and can recursively reload other referenced ConstructClasses
2. It's a class, so you can define methods 2. It's a class, so you can define methods
Currently only supports parsing, but could be extended to support building Currently only supports parsing, but could be extended to support building
@ -276,7 +276,7 @@ class ConstructClassBase(Reloadable, metaclass=ReloadableConstructMeta):
#print(f"_reloadcls({cls})", id(cls)) #print(f"_reloadcls({cls})", id(cls))
newcls = Reloadable._reloadcls.__func__(cls, force) newcls = Reloadable._reloadcls.__func__(cls, force)
if hasattr(newcls, "subcon"): if hasattr(newcls, "subcon"):
recusive_reload(newcls.subcon, token) recursive_reload(newcls.subcon, token)
return newcls return newcls
def _apply(self, obj): def _apply(self, obj):
@ -386,9 +386,9 @@ class ROPointer(Pointer):
return Pointer._parse(self, stream, context, path) return Pointer._parse(self, stream, context, path)
class ConstructClass(ConstructClassBase, Container): class ConstructClass(ConstructClassBase, Container):
""" Offers two benifits over regular construct """ Offers two benefits over regular construct
1. It's reloadable, and can recusrivly reload other refrenced ConstructClasses 1. It's reloadable, and can recursively reload other referenced ConstructClasses
2. It's a class, so you can define methods 2. It's a class, so you can define methods
Currently only supports parsing, but could be extended to support building Currently only supports parsing, but could be extended to support building

6
proxyclient/m1n1/fw/agx/cmdqueue.py
View file

@ -9,7 +9,7 @@ __all__ = []
class WorkCommandBarrier(ConstructClass): class WorkCommandBarrier(ConstructClass):
""" """
sent before WorkCommand3D on the Submit3d queue. sent before WorkCommand3D on the Submit3d queue.
Might be for initilzing the tile buckets? Might be for initializing the tile buckets?
Example: Example:
00000004 0c378018 ffffffa0 00000c00 00000006 00000900 08002c9a 00000000 00000004 0c378018 ffffffa0 00000c00 00000006 00000900 08002c9a 00000000
@ -29,7 +29,7 @@ class WorkCommandBarrier(ConstructClass):
class WorkCommandInitBM(ConstructClass): class WorkCommandInitBM(ConstructClass):
""" """
occationally sent before WorkCommandTA on the SubmitTA queue. occasionally sent before WorkCommandTA on the SubmitTA queue.
Example: Example:
00000004 0c378018 ffffffa0 00000c00 00000006 00000900 08002c9a 00000000 00000004 0c378018 ffffffa0 00000c00 00000006 00000900 08002c9a 00000000
@ -494,7 +494,7 @@ class CommandQueueInfo(ConstructClass):
""" Structure type shared by Submit3D, SubmitTA and SubmitCompute """ Structure type shared by Submit3D, SubmitTA and SubmitCompute
Applications have multiple of these, one of each submit type Applications have multiple of these, one of each submit type
TODO: Can applications have more than one of each type? One per encoder? TODO: Can applications have more than one of each type? One per encoder?
Mostly managed by GPU, only intialize by CPU Mostly managed by GPU, only initialize by CPU
""" """
subcon = Struct( subcon = Struct(

2
proxyclient/m1n1/fw/agx/initdata.py
View file

@ -1020,7 +1020,7 @@ class IOMapping(ConstructClass):
"phys_addr" / Int64ul, "phys_addr" / Int64ul,
"virt_addr" / Int64ul, "virt_addr" / Int64ul,
"size" / Int32ul, "size" / Int32ul,
"range_size" / Int32ul, # Useally the same as size, but for MCC, this is the size of a single MMC register range. "range_size" / Int32ul, # Usually the same as size, but for MCC, this is the size of a single MMC register range.
"readwrite" / Int64ul "readwrite" / Int64ul
) )

2
proxyclient/m1n1/fw/agx/microsequence.py
View file

@ -772,7 +772,7 @@ class FinalizeComputeCmd(ConstructClass):
"unk_54" / Int32ul, "unk_54" / Int32ul,
"unk_58" / Int32ul, "unk_58" / Int32ul,
Ver("G == G14 && V < V13_0B4", "unk_5c_g14" / Int64ul), Ver("G == G14 && V < V13_0B4", "unk_5c_g14" / Int64ul),
"restart_branch_offset" / Int32sl, # realative offset from start of Finalize to StartComputeCmd "restart_branch_offset" / Int32sl, # relative offset from start of Finalize to StartComputeCmd
"unk_60" / Int32ul, "unk_60" / Int32ul,
Ver("V >= V13_0B4", "unk_64" / HexDump(Bytes(0xd))), Ver("V >= V13_0B4", "unk_64" / HexDump(Bytes(0xd))),
Ver("V >= V13_0B4", "unkptr_71" / Int64ul), Ver("V >= V13_0B4", "unkptr_71" / Int64ul),

2
proxyclient/m1n1/fw/dcp/ipc.py
View file

@ -875,7 +875,7 @@ class ServiceRelay(IPCObject):
else: else:
sr_mapDeviceMemoryWithIndex = Callback(IOMFBStatus, "sr_mapDeviceMemoryWithIndex", obj=FourCC, index=uint, flags=uint, unk_u64=OutPtr(ulong), addr=OutPtr(ulong), length=OutPtr(ulong)) sr_mapDeviceMemoryWithIndex = Callback(IOMFBStatus, "sr_mapDeviceMemoryWithIndex", obj=FourCC, index=uint, flags=uint, unk_u64=OutPtr(ulong), addr=OutPtr(ulong), length=OutPtr(ulong))
D400 = Callback(void, "get_property", obj=FourCC, key=string(0x40), value=OutPtr(Bytes(0x200)), lenght=InOutPtr(uint)) D400 = Callback(void, "get_property", obj=FourCC, key=string(0x40), value=OutPtr(Bytes(0x200)), length=InOutPtr(uint))
D401 = Callback(bool_, "sr_get_uint_prop", obj=FourCC, key=string(0x40), value=InOutPtr(ulong)) D401 = Callback(bool_, "sr_get_uint_prop", obj=FourCC, key=string(0x40), value=InOutPtr(ulong))
D404 = Callback(void, "sr_set_uint_prop", obj=FourCC, key=string(0x40), value=uint) D404 = Callback(void, "sr_set_uint_prop", obj=FourCC, key=string(0x40), value=uint)
D406 = Callback(void, "set_fx_prop", obj=FourCC, key=string(0x40), value=uint) D406 = Callback(void, "set_fx_prop", obj=FourCC, key=string(0x40), value=uint)

16
proxyclient/m1n1/hv/gdbserver/__init__.py
View file

@ -19,7 +19,7 @@ class GDBServer:
"fpsr" / Int32ul, "fpsr" / Int32ul,
"fpcr" / Int32ul, "fpcr" / Int32ul,
) )
__seperator = re.compile("[,;:]") __separator = re.compile("[,;:]")
def __init__(self, hv, address, log): def __init__(self, hv, address, log):
self.__hc = None self.__hc = None
@ -177,12 +177,12 @@ class GDBServer:
self.__hv.reboot() self.__hv.reboot()
if data[0] in b"m": if data[0] in b"m":
split = GDBServer.__seperator.split(data[1:].decode(), maxsplit=1) split = GDBServer.__separator.split(data[1:].decode(), maxsplit=1)
fields = [int(field, 16) for field in split] fields = [int(field, 16) for field in split]
return bytes(self.__hv.readmem(fields[0], fields[1]).hex(), "utf-8") return bytes(self.__hv.readmem(fields[0], fields[1]).hex(), "utf-8")
if data[0] in b"M": if data[0] in b"M":
split = GDBServer.__seperator.split(data[1:].decode(), maxsplit=2) split = GDBServer.__separator.split(data[1:].decode(), maxsplit=2)
mem = bytes.fromhex(split[2])[:int(split[1], 16)] mem = bytes.fromhex(split[2])[:int(split[1], 16)]
if self.__hv.writemem(int(split[0], 16), mem) < len(mem): if self.__hv.writemem(int(split[0], 16), mem) < len(mem):
return "E22" return "E22"
@ -237,7 +237,7 @@ class GDBServer:
return b"OK" return b"OK"
if data[0] in b"q": if data[0] in b"q":
split = GDBServer.__seperator.split(data[1:].decode(), maxsplit=1) split = GDBServer.__separator.split(data[1:].decode(), maxsplit=1)
if split[0] == "C": if split[0] == "C":
cpu_id = self.__hg or self.__hv.ctx.cpu_id cpu_id = self.__hg or self.__hv.ctx.cpu_id
return b"QC" + bytes(format(cpu_id, "x"), "utf-8") return b"QC" + bytes(format(cpu_id, "x"), "utf-8")
@ -266,7 +266,7 @@ class GDBServer:
return b"" return b""
if split[0] == "Xfer": if split[0] == "Xfer":
xfer = GDBServer.__seperator.split(split[1], maxsplit=4) xfer = GDBServer.__separator.split(split[1], maxsplit=4)
if xfer[0] == "features" and xfer[1] == "read": if xfer[0] == "features" and xfer[1] == "read":
resource = os.path.join("features", xfer[2]) resource = os.path.join("features", xfer[2])
annex = pkgutil.get_data(__name__, resource) annex = pkgutil.get_data(__name__, resource)
@ -303,7 +303,7 @@ class GDBServer:
if data[0] in b"X": if data[0] in b"X":
partition = data[1:].partition(b":") partition = data[1:].partition(b":")
split = GDBServer.__seperator.split(partition[0].decode(), maxsplit=1) split = GDBServer.__separator.split(partition[0].decode(), maxsplit=1)
mem = partition[2][:int(split[1], 16)] mem = partition[2][:int(split[1], 16)]
if self.__hv.writemem(int(split[0], 16), mem) < len(mem): if self.__hv.writemem(int(split[0], 16), mem) < len(mem):
return b"E22" return b"E22"
@ -311,7 +311,7 @@ class GDBServer:
return b"OK" return b"OK"
if data[0] in b"z": if data[0] in b"z":
split = GDBServer.__seperator.split(data[1:].decode(), maxsplit=2) split = GDBServer.__separator.split(data[1:].decode(), maxsplit=2)
if split[0] == "1": if split[0] == "1":
self.__hv.remove_hw_bp(int(split[1], 16)) self.__hv.remove_hw_bp(int(split[1], 16))
return b"OK" return b"OK"
@ -328,7 +328,7 @@ class GDBServer:
return b"" return b""
if data[0] in b"Z": if data[0] in b"Z":
split = GDBServer.__seperator.split(data[1:].decode(), maxsplit=2) split = GDBServer.__separator.split(data[1:].decode(), maxsplit=2)
if split[0] == "1": if split[0] == "1":
self.__hv.add_hw_bp(int(split[1], 16)) self.__hv.add_hw_bp(int(split[1], 16))
return b"OK" return b"OK"

2
proxyclient/m1n1/hw/prores.py
View file

@ -26,7 +26,7 @@ EncodeNotRawDescriptor = namedtuple('EncodeNotRawDescriptor', [
# 01 -> 16bpp? # 01 -> 16bpp?
# 10 -> 16bpp? # 10 -> 16bpp?
# 11 -> 16bpp? # 11 -> 16bpp?
# the last three all produce slightly differnet outputs # the last three all produce slightly different outputs
# so might be 10/12/14/16????? # so might be 10/12/14/16?????
'flags2', # +0x004 'flags2', # +0x004
'output_iova', # +0x008 'output_iova', # +0x008

2
proxyclient/m1n1/hw/uat.py
View file

@ -23,7 +23,7 @@ class MemoryAttr(IntEnum):
# 00 = Device nGnRnE # 00 = Device nGnRnE
Device = 1 Device = 1
# f4 = Normal, Outer Writeback RW, Inner NC # f4 = Normal, Outer Writeback RW, Inner NC
Shared = 2 # Probally Outer-shareable. Shared with either the main cpu or AGX hardware Shared = 2 # Probably Outer-shareable. Shared with either the main cpu or AGX hardware
# 4f = Normal, Outer NC, Inner Writeback RW # 4f = Normal, Outer NC, Inner Writeback RW
UNK3 = 3 UNK3 = 3
# 00 = Device nGnRnE # 00 = Device nGnRnE

2
proxyclient/m1n1/proxy.py
View file

@ -100,7 +100,7 @@ ExcInfo = Struct(
# 4 byte command, 48 byte null padded data + 4 byte checksum # 4 byte command, 48 byte null padded data + 4 byte checksum
# Responses are of the format: struct format <Ii24sI # Responses are of the format: struct format <Ii24sI
# 4byte Response , 4 byte status, 24 byte string, 4 byte Checksum # 4byte Response , 4 byte status, 24 byte string, 4 byte Checksum
# Response must start 0xff55aaXX where XX distiguishes between them # Response must start 0xff55aaXX where XX distinguishes between them
# In little endian mode these numbers as listed as REQ_* constants # In little endian mode these numbers as listed as REQ_* constants
# defined under UartInterface # defined under UartInterface
# #

2
proxyclient/m1n1/trace/agx.py
View file

@ -31,7 +31,7 @@ class PongMsg(GpuMsg):
UNK = 47, 0 UNK = 47, 0
class PongEp(EP): class PongEp(EP):
# This endpoint recives pongs. The cpu code reads some status registers after receiving one # This endpoint receives pongs. The cpu code reads some status registers after receiving one
# Might be a "work done" message. # Might be a "work done" message.
BASE_MESSAGE = GpuMsg BASE_MESSAGE = GpuMsg

2
proxyclient/m1n1/xnutools.py
View file

@ -7,7 +7,7 @@ __all__ = []
DebuggerState = Struct( DebuggerState = Struct(
"panic_options" / Hex(Int64ul), "panic_options" / Hex(Int64ul),
"current_op" / Hex(Int32ul), "current_op" / Hex(Int32ul),
"proceed_on_sync_failre" / Int32ul, "proceed_on_sync_failure" / Int32ul,
"message" / Hex(Int64ul), "message" / Hex(Int64ul),
"panic_str" / Hex(Int64ul), "panic_str" / Hex(Int64ul),
"panic_args" / Hex(Int64ul), "panic_args" / Hex(Int64ul),

2
src/chickens_firestorm.c
View file

@ -38,7 +38,7 @@ static void init_m1_firestorm(void)
init_common_firestorm(); init_common_firestorm();
// "Cross-beat Crypto(AES/PMUL) ICache fusion is not disabled for branch // "Cross-beat Crypto(AES/PMUL) ICache fusion is not disabled for branch
// uncondtional "recoded instruction." // unconditional "recoded instruction."
reg_set(SYS_IMP_APL_HID0, HID0_FETCH_WIDTH_DISABLE | HID0_CACHE_FUSION_DISABLE); reg_set(SYS_IMP_APL_HID0, HID0_FETCH_WIDTH_DISABLE | HID0_CACHE_FUSION_DISABLE);
reg_set(SYS_IMP_APL_HID7, HID7_FORCE_NONSPEC_IF_STEPPING | reg_set(SYS_IMP_APL_HID7, HID7_FORCE_NONSPEC_IF_STEPPING |

10
src/libfdt/libfdt.h
View file

@ -719,7 +719,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
* pointer to the property's value * pointer to the property's value
* if lenp is non-NULL, *lenp contains the length of the property * if lenp is non-NULL, *lenp contains the length of the property
* value (>=0) * value (>=0)
* if namep is non-NULL *namep contiains a pointer to the property * if namep is non-NULL *namep contains a pointer to the property
* name. * name.
* NULL, on error * NULL, on error
* if lenp is non-NULL, *lenp contains an error code (<0): * if lenp is non-NULL, *lenp contains an error code (<0):
@ -1461,7 +1461,7 @@ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
* @fdt: pointer to the device tree blob * @fdt: pointer to the device tree blob
* @name: name of property to add * @name: name of property to add
* @len: length of property value in bytes * @len: length of property value in bytes
* @valp: returns a pointer to where where the value should be placed * @valp: returns a pointer to where the value should be placed
* *
* returns: * returns:
* 0, on success * 0, on success
@ -1489,7 +1489,7 @@ int fdt_pack(void *fdt);
* @address, @size: 64-bit values (native endian) * @address, @size: 64-bit values (native endian)
* *
* Adds a reserve map entry to the given blob reserving a region at * Adds a reserve map entry to the given blob reserving a region at
* address address of length size. * address of length size.
* *
* This function will insert data into the reserve map and will * This function will insert data into the reserve map and will
* therefore change the indexes of some entries in the table. * therefore change the indexes of some entries in the table.
@ -1596,7 +1596,7 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
* @len: length of the property value * @len: length of the property value
* @prop_data: return pointer to property data * @prop_data: return pointer to property data
* *
* fdt_setprop_placeholer() allocates the named property in the given node. * fdt_setprop_placeholder() allocates the named property in the given node.
* If the property exists it is resized. In either case a pointer to the * If the property exists it is resized. In either case a pointer to the
* property data is returned. * property data is returned.
* *
@ -2050,7 +2050,7 @@ int fdt_del_node(void *fdt, int nodeoffset);
* returns: * returns:
* 0, on success * 0, on success
* -FDT_ERR_NOSPACE, there's not enough space in the base device tree * -FDT_ERR_NOSPACE, there's not enough space in the base device tree
* -FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or * -FDT_ERR_NOTFOUND, the overlay points to some nonexistent nodes or
* properties in the base DT * properties in the base DT
* -FDT_ERR_BADPHANDLE, * -FDT_ERR_BADPHANDLE,
* -FDT_ERR_BADOVERLAY, * -FDT_ERR_BADOVERLAY,

6
src/memory.c
View file

@ -87,7 +87,7 @@ static inline void write_sctlr(u64 val)
* [L1 index] [L2 index] [L3 index] [page offset] * [L1 index] [L2 index] [L3 index] [page offset]
* 12 bits 11 bits 11 bits 14 bits * 12 bits 11 bits 11 bits 14 bits
* *
* We initalize one double-size L1 table which covers the entire virtual memory space, * We initialize one double-size L1 table which covers the entire virtual memory space,
* point to the two halves in the single L0 table and then create L2/L3 tables on demand. * point to the two halves in the single L0 table and then create L2/L3 tables on demand.
*/ */
@ -447,7 +447,7 @@ static void mmu_add_default_mappings(void)
mmu_add_mapping(ram_base | REGION_RX_EL1, ram_base, ram_size, MAIR_IDX_NORMAL, PERM_RX_EL0); mmu_add_mapping(ram_base | REGION_RX_EL1, ram_base, ram_size, MAIR_IDX_NORMAL, PERM_RX_EL0);
/* /*
* Create four seperate full mappings of MMIO space, with different access types * Create four separate full mappings of MMIO space, with different access types
*/ */
mmu_add_mapping(0xc000000000, 0x0000000000, 0x0800000000, MAIR_IDX_DEVICE_GRE, PERM_RW_EL0); mmu_add_mapping(0xc000000000, 0x0000000000, 0x0800000000, MAIR_IDX_DEVICE_GRE, PERM_RW_EL0);
mmu_add_mapping(0xd000000000, 0x0000000000, 0x0800000000, MAIR_IDX_DEVICE_nGRE, PERM_RW_EL0); mmu_add_mapping(0xd000000000, 0x0000000000, 0x0800000000, MAIR_IDX_DEVICE_nGRE, PERM_RW_EL0);
@ -496,7 +496,7 @@ void mmu_init(void)
printf("MMU: Initializing...\n"); printf("MMU: Initializing...\n");
if (read_sctlr() & SCTLR_M) { if (read_sctlr() & SCTLR_M) {
printf("MMU: already intialized.\n"); printf("MMU: already initialized.\n");
return; return;
} }

6
src/minilzlib/lzmadec.c
View file

@ -28,7 +28,7 @@ Environment:
#include "lzmadec.h" #include "lzmadec.h"
// //
// Probability Bit Model for Lenghts in Rep and in Match sequences // Probability Bit Model for lengths in Rep and in Match sequences
// //
typedef struct _LENGTH_DECODER_STATE typedef struct _LENGTH_DECODER_STATE
{ {
@ -291,7 +291,7 @@ LzDecodeLen (
uint16_t limit; uint16_t limit;
// //
// Lenghts of 2 and higher are encoded in 3 possible types of arithmetic- // Lengths of 2 and higher are encoded in 3 possible types of arithmetic-
// coded bit trees, depending on the size of the length. // coded bit trees, depending on the size of the length.
// //
// Lengths 2-9 are encoded in trees called "Low" using 3 bits of data. // Lengths 2-9 are encoded in trees called "Low" using 3 bits of data.
@ -377,7 +377,7 @@ LzDecodeMatch (
// called "direct bits". The formula below also tells us how many such // called "direct bits". The formula below also tells us how many such
// direct bits to use in this scenario. In other words, distBits can // direct bits to use in this scenario. In other words, distBits can
// either be the number of "context encoded bits" for slots 4-13, or it // either be the number of "context encoded bits" for slots 4-13, or it
// can be the the number of "direct bits" for slots 14-63. This gives // can be the number of "direct bits" for slots 14-63. This gives
// us a range of of 2 to 26 bits, which are then used as middle bits. // us a range of of 2 to 26 bits, which are then used as middle bits.
// Finally, the last 4 bits are called the "align" bits. The smallest // Finally, the last 4 bits are called the "align" bits. The smallest
// possible number we can encode is now going to be 0b10[00][0000] and // possible number we can encode is now going to be 0b10[00][0000] and

8
src/minilzlib/lzmadec.h
View file

@ -54,7 +54,7 @@ Environment:
// //
// Distances can be encoded in different ways, based on the distance slot. // Distances can be encoded in different ways, based on the distance slot.
// Lengths of 2, 3, 4 bytes are directly encoded with their own slot. Lengths // Lengths of 2, 3, 4 bytes are directly encoded with their own slot. Lengths
// over 5 share a slot, which is then further subdivded into 3 different ways // over 5 share a slot, which is then further subdivided into 3 different ways
// of encoding them, which are described in the source. // of encoding them, which are described in the source.
// //
#define LZMA_DISTANCE_SLOTS 64 #define LZMA_DISTANCE_SLOTS 64
@ -81,13 +81,13 @@ typedef enum _LZMA_SEQUENCE_STATE
// //
LzmaLitLitLitState, LzmaLitLitLitState,
// //
// States where we last saw two literals preceeded by a non-literal // States where we last saw two literals preceded by a non-literal
// //
LzmaMatchLitLitState, LzmaMatchLitLitState,
LzmaRepLitLitState, LzmaRepLitLitState,
LzmaLitShortrepLitLitState, LzmaLitShortrepLitLitState,
// //
// States where we last saw one literal preceeded by a non-literal // States where we last saw one literal preceded by a non-literal
// //
LzmaMatchLitState, LzmaMatchLitState,
LzmaRepLitState, LzmaRepLitState,
@ -97,7 +97,7 @@ typedef enum _LZMA_SEQUENCE_STATE
// //
LzmaMaxLitState, LzmaMaxLitState,
// //
// States where we last saw a non-literal preceeded by a literal // States where we last saw a non-literal preceded by a literal
// //
LzmaLitMatchState = 7, LzmaLitMatchState = 7,
LzmaLitRepState, LzmaLitRepState,

6
src/nvme.c
View file

@ -42,8 +42,8 @@
#define NVME_LINEAR_SQ_CTRL 0x24908 #define NVME_LINEAR_SQ_CTRL 0x24908
#define NVME_LINEAR_SQ_CTRL_EN BIT(0) #define NVME_LINEAR_SQ_CTRL_EN BIT(0)
#define NVME_UNKNONW_CTRL 0x24008 #define NVME_UNKNOWN_CTRL 0x24008
#define NVME_UNKNONW_CTRL_PRP_NULL_CHECK BIT(11) #define NVME_UNKNOWN_CTRL_PRP_NULL_CHECK BIT(11)
#define NVME_MAX_PEND_CMDS_CTRL 0x1210 #define NVME_MAX_PEND_CMDS_CTRL 0x1210
#define NVME_DB_LINEAR_ASQ 0x2490c #define NVME_DB_LINEAR_ASQ 0x2490c
@ -349,7 +349,7 @@ bool nvme_init(void)
/* setup controller and NVMMU for linear submission queue */ /* setup controller and NVMMU for linear submission queue */
set32(nvme_base + NVME_LINEAR_SQ_CTRL, NVME_LINEAR_SQ_CTRL_EN); set32(nvme_base + NVME_LINEAR_SQ_CTRL, NVME_LINEAR_SQ_CTRL_EN);
clear32(nvme_base + NVME_UNKNONW_CTRL, NVME_UNKNONW_CTRL_PRP_NULL_CHECK); clear32(nvme_base + NVME_UNKNOWN_CTRL, NVME_UNKNOWN_CTRL_PRP_NULL_CHECK);
write32(nvme_base + NVME_MAX_PEND_CMDS_CTRL, write32(nvme_base + NVME_MAX_PEND_CMDS_CTRL,
((NVME_QUEUE_SIZE - 1) << 16) | (NVME_QUEUE_SIZE - 1)); ((NVME_QUEUE_SIZE - 1) << 16) | (NVME_QUEUE_SIZE - 1));
write32(nvme_base + NVMMU_NUM, NVME_QUEUE_SIZE - 1); write32(nvme_base + NVMMU_NUM, NVME_QUEUE_SIZE - 1);

2
src/rtkit.c
View file

@ -386,7 +386,7 @@ int rtkit_recv(rtkit_dev_t *rtk, struct rtkit_message *msg)
msg->msg = asc_msg.msg0; msg->msg = asc_msg.msg0;
msg->ep = (u8)asc_msg.msg1; msg->ep = (u8)asc_msg.msg1;
/* if this is an app message we can just forwad it to the caller */ /* if this is an app message we can just forward it to the caller */
if (msg->ep >= 0x20) if (msg->ep >= 0x20)
return 1; return 1;

4
src/tps6598x.c
View file

@ -112,7 +112,7 @@ int tps6598x_disable_irqs(tps6598x_dev_t *dev, tps6598x_irq_state_t *state)
u8 tmp[CD3218B12_IRQ_WIDTH] = {0x00}; u8 tmp[CD3218B12_IRQ_WIDTH] = {0x00};
read = i2c_smbus_read(dev->i2c, dev->addr, TPS_REG_INT_MASK1, tmp, CD3218B12_IRQ_WIDTH); read = i2c_smbus_read(dev->i2c, dev->addr, TPS_REG_INT_MASK1, tmp, CD3218B12_IRQ_WIDTH);
if (read != CD3218B12_IRQ_WIDTH) if (read != CD3218B12_IRQ_WIDTH)
printf("tps6598x: failed verifcation, can't read TPS_REG_INT_MASK1\n"); printf("tps6598x: failed verification, can't read TPS_REG_INT_MASK1\n");
else { else {
printf("tps6598x: verify: TPS_REG_INT_MASK1 vs. saved IntMask1\n"); printf("tps6598x: verify: TPS_REG_INT_MASK1 vs. saved IntMask1\n");
hexdump(tmp, sizeof(tmp)); hexdump(tmp, sizeof(tmp));
@ -138,7 +138,7 @@ int tps6598x_restore_irqs(tps6598x_dev_t *dev, tps6598x_irq_state_t *state)
u8 tmp[CD3218B12_IRQ_WIDTH]; u8 tmp[CD3218B12_IRQ_WIDTH];
read = i2c_smbus_read(dev->i2c, dev->addr, TPS_REG_INT_MASK1, tmp, sizeof(tmp)); read = i2c_smbus_read(dev->i2c, dev->addr, TPS_REG_INT_MASK1, tmp, sizeof(tmp));
if (read != sizeof(tmp)) if (read != sizeof(tmp))
printf("tps6598x: failed verifcation, can't read TPS_REG_INT_MASK1\n"); printf("tps6598x: failed verification, can't read TPS_REG_INT_MASK1\n");
else { else {
printf("tps6598x: verify saved IntMask1 vs. TPS_REG_INT_MASK1:\n"); printf("tps6598x: verify saved IntMask1 vs. TPS_REG_INT_MASK1:\n");
hexdump(state->int_mask1, sizeof(state->int_mask1)); hexdump(state->int_mask1, sizeof(state->int_mask1));

2
src/usb_dwc3_regs.h
View file

@ -73,7 +73,7 @@
#define DWC3_GSNPSID_MASK 0xffff0000 #define DWC3_GSNPSID_MASK 0xffff0000
#define DWC3_GSNPSREV_MASK 0xffff #define DWC3_GSNPSREV_MASK 0xffff
/* DWC3 registers memory space boundries */ /* DWC3 registers memory space boundaries */
#define DWC3_XHCI_REGS_START 0x0 #define DWC3_XHCI_REGS_START 0x0
#define DWC3_XHCI_REGS_END 0x7fff #define DWC3_XHCI_REGS_END 0x7fff
#define DWC3_GLOBALS_REGS_START 0xc100 #define DWC3_GLOBALS_REGS_START 0xc100