From e2065decbe36f6ceabdd072d73e0aa5e0e8a9f62 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Povi=C5=A1er?= Date: Tue, 14 Jun 2022 20:24:42 +0200 Subject: [PATCH] m1n1.trace.i2c: Clean up handling of page/immediate split MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also fix detection of read being a read of the page control register. Signed-off-by: Martin PoviĊĦer --- proxyclient/m1n1/trace/i2c.py | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/proxyclient/m1n1/trace/i2c.py b/proxyclient/m1n1/trace/i2c.py index 6fc7ac03..9c4bbb66 100644 --- a/proxyclient/m1n1/trace/i2c.py +++ b/proxyclient/m1n1/trace/i2c.py @@ -171,20 +171,24 @@ class I2CRegMapTracer(I2CDevTracer): self.regbytes.append(data) if len(self.regbytes)*8 >= self.pageshift: - subreg = int.from_bytes(bytes(self.regbytes), + immediate = int.from_bytes(bytes(self.regbytes), byteorder="big") - self.reg = self.page << self.pageshift | subreg + self.reg = self.page << self.pageshift | immediate return True + @property + def reg_imm(self): + '''Returns the 'immediate' part of current register address''' + return self.reg & ~(~0 << self.pageshift) + def handle_page_register(self, data): if not self.paged: return False - subreg = self.reg & ~(~0 << self.pageshift) - if subreg >= self.npagebytes: + if self.reg_imm >= self.npagebytes: return False - shift = 8 * subreg + shift = 8 * self.reg_imm self.page &= ~(0xff << shift) self.page |= data << shift return True @@ -192,7 +196,7 @@ class I2CRegMapTracer(I2CDevTracer): def write(self, data): if self.handle_addressing(data): return - if self.handle_page_register(data): + elif self.handle_page_register(data): pass else: self.regwrite(self.reg, data) @@ -201,7 +205,7 @@ class I2CRegMapTracer(I2CDevTracer): super().write(data) def read(self, data): - if self.reg & 0xff != 0: + if self.reg_imm >= self.npagebytes: self.regread(self.reg, data) self.reg += 1 super().read(data)