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https://github.com/AsahiLinux/m1n1
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m1n1.trace.gpio: convert GPIOTracer to new framework
Signed-off-by: Janne Grunau <j@jannau.net>
This commit is contained in:
Janne Grunau
Hector Martin
parent
ccd765464d
commit
de82209079
2 changed files with 112 additions and 98 deletions
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@ -1,101 +1,8 @@
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# SPDX-License-Identifier: MIT
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from construct import *
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GpioPin = BitStruct(
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"u_top" / BitsInteger(13),
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"group" / BitsInteger(3),
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"u15" / Bit,
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"u14" / Bit,
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"u13" / Bit,
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"u12" / Bit,
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"u11" / Bit,
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"u10" / Bit,
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"cfg_done" / Bit,
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"u8" / Bit,
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"u7" / Bit,
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"u6" / Bit,
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"periph" / Bit,
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"u4" / Bit,
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"irq" / BitsInteger(3),
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"value" / Bit,
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)
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class MmioTraceGpio:
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def __init__(self, name, nr_pins):
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self.name = name
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self.nr_pins = nr_pins
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self.pins = [0 for x in range(nr_pins)]
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self.pn = {
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0xc0: "i2c0:scl",
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0xbc: "i2c0:sda",
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0xc9: "i2c1:scl",
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0xc7: "i2c1:sda",
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0xa3: "i2c2:scl",
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0xa2: "i2c2:sda",
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106: "hpm:irq",
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136: "bluetooth:irq",
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196: "wlan:irq",
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183: "cs42l83:irq",
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182: "tas5770:irq",
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152: "pci@0,0",
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153: "pci@1,0",
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33: "pci@2,0",
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}
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self.IRQ_ACT = 0x800
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self.IRQ_GRP_SZ = 0x40
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def handle_pin(self, pin, data, write):
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# ignore noisy SPI NOR chip select?
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if pin == 45:
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return
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if data != self.pins[pin]:
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p = GpioPin.parse(Int32ub.build(data))
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if not write and not p.cfg_done:
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return
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config = f"top:{p.u_top:#04x} group:{p.group} u15:{p.u15} u14:{p.u14} " + \
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f"u13:{p.u13} u12:{p.u12} u11:{p.u11} u10:{p.u10} " + \
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f"cfg_done:{p.cfg_done} u8:{p.u8} u7:{p.u7} u6:{p.u6} " + \
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f"periph:{p.periph} u4:{p.u4} irq:{p.irq:#3x} val:{p.value}"
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t = "W" if write else "R"
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print(f"{self.name} {self.pn.get(pin, pin):>15}: {t} {config}")
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self.pins[pin] = data
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def handle_irq(self, group, start, data, write):
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desc = "masking" if write else "active"
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if data == 0xFFFFFFFF:
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print(f"{self.name}: IRQ group {group} {desc:>7}: {start:>3} - {start + 31:>3}")
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else:
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irqs = [self.pn.get(start + i, start + i) for i in range(32) if (data >> i) & 0x1]
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print(f"{self.name}: IRQ group {group} {desc:>7}: " + " ".join(irqs))
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def handle_mmiotrace(self, evt, zone):
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offset = evt.addr - zone.start
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if evt.flags.WIDTH != 2:
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print(f"GPIO: unexpected width {evt.flags.WIDTH}")
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return
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if offset >= 0 and offset < 4 * self.nr_pins:
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self.handle_pin(offset // 4, int(evt.data), evt.flags.WRITE)
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elif offset >= self.IRQ_ACT and offset < self.IRQ_ACT + 7 * self.IRQ_GRP_SZ:
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if evt.data:
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group = (offset - self.IRQ_ACT) // self.IRQ_GRP_SZ
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start = (offset & (self.IRQ_GRP_SZ - 1)) * 8
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self.handle_irq(group, start, evt.data, evt.flags.WRITE)
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else:
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t = "W" if evt.flags.WRITE else "R"
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m = "+" if evt.flags.MULTI else " "
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print(f"{self.name}: {t}.{1<<evt.flags.WIDTH:<2}{m} unknown offset {offset:#06x}) = {evt.data:#x}")
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from m1n1.trace.gpio import GPIOTracer
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#trace_device("/arm-io/gpio", True)
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# trace gpio interrups, useful to follow the cascaded interrupts
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aic_phandle = getattr(hv.adt["/arm-io/aic"], "AAPL,phandle")
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@ -104,6 +11,6 @@ if getattr(node, "interrupt-parent") == aic_phandle:
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for irq in getattr(node, "interrupts"):
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hv.trace_irq(node.name, irq, 1, hv.IRQTRACE_IRQ)
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gpio_trace = MmioTraceGpio(node.name, getattr(node, "#gpio-pins"))
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hv.trace_device("/arm-io/gpio", handler=gpio_trace)
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GPIOTracer = GPIOTracer._reloadcls()
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gpio_tracer = GPIOTracer(hv, "/arm-io/gpio", verbose=0)
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gpio_tracer.start()
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107
proxyclient/m1n1/trace/gpio.py
Normal file
107
proxyclient/m1n1/trace/gpio.py
Normal file
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@ -0,0 +1,107 @@
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# SPDX-License-Identifier: MIT
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from ..hv import TraceMode
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from ..utils import *
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from . import ADTDevTracer
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class R_PIN(Register32):
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GROUP = 18, 16
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CFG_DONE = 9
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PERIPH = 5
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CONFIG = 3, 1
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VALUE = 0
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class GPIORegs(RegMap):
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IRQ_ACT = 0x800
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IRQ_GRP_SZ = 0x40
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PIN = irange(0x000, 212, 4), R_PIN
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IRQ_GROUP0 = irange(IRQ_ACT + 0 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP1 = irange(IRQ_ACT + 1 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP2 = irange(IRQ_ACT + 2 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP3 = irange(IRQ_ACT + 3 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP4 = irange(IRQ_ACT + 4 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP5 = irange(IRQ_ACT + 5 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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IRQ_GROUP6 = irange(IRQ_ACT + 6 * IRQ_GRP_SZ, (212 + 31) // 32, 4), Register32
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def bits32(val, start):
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return [start + i for i in range(0, 32) if int(val) & (1 << i)]
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class GPIOTracer(ADTDevTracer):
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DEFAULT_MODE = TraceMode.UNBUF
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REGMAPS = [GPIORegs]
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NAMES = ["gpio"]
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PIN_NAMES = {
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0xC0: "i2c0:scl",
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0xBC: "i2c0:sda",
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0xC9: "i2c1:scl",
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0xC7: "i2c1:sda",
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0xA3: "i2c2:scl",
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0xA2: "i2c2:sda",
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106: "hpm:irq",
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136: "bluetooth:irq",
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196: "wlan:irq",
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183: "cs42l83:irq",
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182: "tas5770:irq",
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152: "pci@0,0",
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153: "pci@1,0",
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33: "pci@2,0",
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0x2D: "spi_nor:CS"
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}
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def pn(self, pin):
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return self.PIN_NAMES.get(pin, f"Pin-{pin}")
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def r_PIN(self, val, index):
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if index == 0x2D and self.verbose < 2:
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return # ignore noisy SPI NOR CS
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self.log(f"{self.pn(index):14} R {val!s} ")
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def w_PIN(self, val, index):
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if index == 0x2D and self.verbose < 2:
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return # ignore noisy SPI NOR CS
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self.log(f"{self.pn(index):14} W {val!s} ")
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def r_IRQ_GROUP(self, val, index, grp):
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if int(val) != 0:
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self.log(f"IRQ[{grp}] ACT {[self.pn(x) for x in bits32(val, index * 32)]}")
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def r_IRQ_GROUP0(self, val, index):
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self.r_IRQ_GROUP(val, index, 0)
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def r_IRQ_GROUP1(self, val, index):
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self.r_IRQ_GROUP(val, index, 1)
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def r_IRQ_GROUP2(self, val, index):
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self.r_IRQ_GROUP(val, index, 2)
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def r_IRQ_GROUP3(self, val, index):
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self.r_IRQ_GROUP(val, index, 3)
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def r_IRQ_GROUP4(self, val, index):
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self.r_IRQ_GROUP(val, index, 4)
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def r_IRQ_GROUP5(self, val, index):
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self.r_IRQ_GROUP(val, index, 5)
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def r_IRQ_GROUP6(self, val, index):
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self.r_IRQ_GROUP(val, index, 6)
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def w_IRQ_GROUP(self, val, index, grp):
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if int(val) == (1 << 32) - 1:
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self.log(f"IRQ[{grp}] ACK {index * 32} - {index * 32 + 31}")
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elif int(val) != 0:
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self.log(f"IRQ[{grp}] ACK {[self.pn(x) for x in bits32(val, index * 32)]}")
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def w_IRQ_GROUP0(self, val, index):
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self.w_IRQ_GROUP(val, index, 0)
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def w_IRQ_GROUP1(self, val, index):
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self.w_IRQ_GROUP(val, index, 1)
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def w_IRQ_GROUP2(self, val, index):
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self.w_IRQ_GROUP(val, index, 2)
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def w_IRQ_GROUP3(self, val, index):
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self.w_IRQ_GROUP(val, index, 3)
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def w_IRQ_GROUP4(self, val, index):
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self.w_IRQ_GROUP(val, index, 4)
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def w_IRQ_GROUP5(self, val, index):
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self.w_IRQ_GROUP(val, index, 5)
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def w_IRQ_GROUP6(self, val, index):
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self.w_IRQ_GROUP(val, index, 6)
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