m1n1.agx: Python 3.13 fix

Signed-off-by: Asahi Lina <lina@asahilina.net>
This commit is contained in:
Asahi Lina 2024-11-24 18:26:22 +09:00
parent 62ff43f095
commit dbc0a34777
2 changed files with 4 additions and 5 deletions

View file

@ -136,7 +136,7 @@ class AGX:
# All channels have 0x100 items # All channels have 0x100 items
item_count = ring_size item_count = ring_size
item_size = cls.item_size item_size = cls.item_size()
ring_size = item_count * item_size ring_size = item_count * item_size
self.log(f"Allocating {count} channel(s) for {name} ({item_count} * {item_size:#x} bytes each)") self.log(f"Allocating {count} channel(s) for {name} ({item_count} * {item_size:#x} bytes each)")

View file

@ -21,7 +21,6 @@ class GPUChannel:
self.state.WRITE_PTR.val = 0 self.state.WRITE_PTR.val = 0
@classmethod @classmethod
@property
def item_size(cls): def item_size(cls):
return cls.MSG_CLASS.sizeof() return cls.MSG_CLASS.sizeof()
@ -34,7 +33,7 @@ class GPUTXChannel(GPUChannel):
def send_message(self, msg): def send_message(self, msg):
wptr = self.state.WRITE_PTR.val wptr = self.state.WRITE_PTR.val
self.iface.writemem(self.ring_addr + self.item_size * wptr, self.iface.writemem(self.ring_addr + self.item_size() * wptr,
msg.build()) msg.build())
self.state.WRITE_PTR.val = (wptr + 1) % self.ring_size self.state.WRITE_PTR.val = (wptr + 1) % self.ring_size
self.doorbell() self.doorbell()
@ -48,8 +47,8 @@ class GPURXChannel(GPUChannel):
raise Exception(f"wptr = {wptr:#x} > {self.ring_size:#x}") raise Exception(f"wptr = {wptr:#x} > {self.ring_size:#x}")
while rptr != wptr: while rptr != wptr:
msg = self.iface.readmem(self.ring_addr + self.item_size * rptr, msg = self.iface.readmem(self.ring_addr + self.item_size() * rptr,
self.item_size) self.item_size())
self.handle_message(self.MSG_CLASS.parse(msg)) self.handle_message(self.MSG_CLASS.parse(msg))
rptr = (rptr + 1) % self.ring_size rptr = (rptr + 1) % self.ring_size
self.state.READ_PTR.val = rptr self.state.READ_PTR.val = rptr