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experiments/dcp_iboot_m2pro.py: Support M2 Mac Mini
dptx-phy and lpdptx-phy look mostly identical. lpdptx-phy might support DP 2.0 DP 2.0 link rates if the 8k@60 is supported without DSC or chroma subsampling. Signed-off-by: Janne Grunau <j@jannau.net>
This commit is contained in:
Janne Grunau
Hector Martin
parent
008aad39a3
commit
cc7acfb65c
1 changed files with 377 additions and 17 deletions
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@ -34,6 +34,336 @@ class Phy:
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def set_active_lane_count(self, lanes):
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pass
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class dptx_phy(Phy):
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def activate(self):
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print(f"dptx phy activate")
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# MMIO: R.4 0x23c500010 (dptx-phy[1], offset 0x10) = 0x0
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p.read32(self.phy_regs[1] + 0x10);
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p.write32(self.phy_regs[1] + 0x10, 0x0);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x444
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x454);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x454
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x474);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x474
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x434);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x434
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x534);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x534
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x734);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x734
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x334);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x334
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x335);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x335
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x337);
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# MMIO: R.4 0x23c500048 (dptx-phy[1], offset 0x48) = 0x337
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p.read32(self.phy_regs[1] + 0x48);
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p.write32(self.phy_regs[1] + 0x48, 0x333);
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# MMIO: R.4 0x23c542014 (dptx-phy[0], offset 0x2014) = 0x80a0c
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p.read32(self.phy_regs[0] + 0x2014);
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p.write32(self.phy_regs[0] + 0x2014, 0x300a0c);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x644800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x654800);
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# MMIO: R.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x11090a2
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p.read32(self.phy_regs[0] + 0x2220);
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p.write32(self.phy_regs[0] + 0x2220, 0x11090a0);
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# MMIO: R.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103003
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p.read32(self.phy_regs[0] + 0x222c);
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p.write32(self.phy_regs[0] + 0x222c, 0x103803);
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# MMIO: R.4 0x23c54222c (dptx-phy[0], offset 0x222c) = 0x103803
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p.read32(self.phy_regs[0] + 0x222c);
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p.write32(self.phy_regs[0] + 0x222c, 0x103903);
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# MMIO: R.4 0x23c542230 (dptx-phy[0], offset 0x2230) = 0x2308804
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p.read32(self.phy_regs[0] + 0x2230);
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p.write32(self.phy_regs[0] + 0x2230, 0x2208804);
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# MMIO: R.4 0x23c542278 (dptx-phy[0], offset 0x2278) = 0x18300811
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p.read32(self.phy_regs[0] + 0x2278);
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p.write32(self.phy_regs[0] + 0x2278, 0x10300811);
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# MMIO: R.4 0x23c5422a4 (dptx-phy[0], offset 0x22a4) = 0x1044200
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p.read32(self.phy_regs[0] + 0x22a4);
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p.write32(self.phy_regs[0] + 0x22a4, 0x1044201);
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# MMIO: R.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x18030
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p.read32(self.phy_regs[0] + 0x4008);
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p.write32(self.phy_regs[0] + 0x4008, 0x30030);
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# MMIO: R.4 0x23c544008 (dptx-phy[0], offset 0x4008) = 0x30030
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p.read32(self.phy_regs[0] + 0x4008);
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p.write32(self.phy_regs[0] + 0x4008, 0x30010);
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# MMIO: R.4 0x23c54420c (dptx-phy[0], offset 0x420c) = 0x88e3
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p.read32(self.phy_regs[0] + 0x420c);
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p.write32(self.phy_regs[0] + 0x420c, 0x88c3);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x0
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p.read32(self.phy_regs[0] + 0x4600);
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p.write32(self.phy_regs[0] + 0x4600, 0x8000000);
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# MMIO: R.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x21780
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p.read32(self.phy_regs[0] + 0x5040);
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p.write32(self.phy_regs[0] + 0x5040, 0x221780);
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# MMIO: R.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x21780
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p.read32(self.phy_regs[0] + 0x6040);
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p.write32(self.phy_regs[0] + 0x6040, 0x221780);
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# MMIO: R.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x21780
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p.read32(self.phy_regs[0] + 0x7040);
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p.write32(self.phy_regs[0] + 0x7040, 0x221780);
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# MMIO: R.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x21780
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p.read32(self.phy_regs[0] + 0x8040);
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p.write32(self.phy_regs[0] + 0x8040, 0x221780);
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# MMIO: R.4 0x23c545040 (dptx-phy[0], offset 0x5040) = 0x221780
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p.read32(self.phy_regs[0] + 0x5040);
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p.write32(self.phy_regs[0] + 0x5040, 0x2a1780);
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# MMIO: R.4 0x23c546040 (dptx-phy[0], offset 0x6040) = 0x221780
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p.read32(self.phy_regs[0] + 0x6040);
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p.write32(self.phy_regs[0] + 0x6040, 0x2a1780);
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# MMIO: R.4 0x23c547040 (dptx-phy[0], offset 0x7040) = 0x221780
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p.read32(self.phy_regs[0] + 0x7040);
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p.write32(self.phy_regs[0] + 0x7040, 0x2a1780);
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# MMIO: R.4 0x23c548040 (dptx-phy[0], offset 0x8040) = 0x221780
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p.read32(self.phy_regs[0] + 0x8040);
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p.write32(self.phy_regs[0] + 0x8040, 0x2a1780);
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# MMIO: R.4 0x23c545244 (dptx-phy[0], offset 0x5244) = 0x18
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p.read32(self.phy_regs[0] + 0x5244);
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p.write32(self.phy_regs[0] + 0x5244, 0x8);
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# MMIO: R.4 0x23c546244 (dptx-phy[0], offset 0x6244) = 0x18
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p.read32(self.phy_regs[0] + 0x6244);
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p.write32(self.phy_regs[0] + 0x6244, 0x8);
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# MMIO: R.4 0x23c547244 (dptx-phy[0], offset 0x7244) = 0x18
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p.read32(self.phy_regs[0] + 0x7244);
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p.write32(self.phy_regs[0] + 0x7244, 0x8);
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# MMIO: R.4 0x23c548244 (dptx-phy[0], offset 0x8244) = 0x18
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p.read32(self.phy_regs[0] + 0x8244);
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p.write32(self.phy_regs[0] + 0x8244, 0x8);
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# MMIO: R.4 0x23c542214 (dptx-phy[0], offset 0x2214) = 0x1e0
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p.read32(self.phy_regs[0] + 0x2214);
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p.write32(self.phy_regs[0] + 0x2214, 0x1e1);
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# MMIO: R.4 0x23c542224 (dptx-phy[0], offset 0x2224) = 0x20086001
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p.read32(self.phy_regs[0] + 0x2224);
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p.write32(self.phy_regs[0] + 0x2224, 0x20086000);
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# MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2000
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p.read32(self.phy_regs[0] + 0x2200);
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p.write32(self.phy_regs[0] + 0x2200, 0x2002);
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# MMIO: R.4 0x23c541000 (dptx-phy[0], offset 0x1000) = 0xe0000003
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p.read32(self.phy_regs[0] + 0x1000);
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p.write32(self.phy_regs[0] + 0x1000, 0xe0000001);
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# MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x41
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p.read32(self.phy_regs[0] + 0x4004);
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p.write32(self.phy_regs[0] + 0x4004, 0x49);
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# MMIO: R.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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p.read32(self.phy_regs[0] + 0x4404);
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p.write32(self.phy_regs[0] + 0x4404, 0x555d444);
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# MMIO: R.4 0x23c544404 (dptx-phy[0], offset 0x4404) = 0x555d444
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p.read32(self.phy_regs[0] + 0x4404);
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p.write32(self.phy_regs[0] + 0x4404, 0x555d444);
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self.set_active_lane_count(0)
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# MMIO: R.4 0x23c544200 (dptx-phy[0], offset 0x4200) = 0x4002430
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p.read32(self.phy_regs[0] + 0x4200);
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p.write32(self.phy_regs[0] + 0x4200, 0x4002420);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
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p.read32(self.phy_regs[0] + 0x4600);
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p.write32(self.phy_regs[0] + 0x4600, 0x8000000);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000000
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p.read32(self.phy_regs[0] + 0x4600);
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p.write32(self.phy_regs[0] + 0x4600, 0x8000001);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000001
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p.read32(self.phy_regs[0] + 0x4600);
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p.write32(self.phy_regs[0] + 0x4600, 0x8000003);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000043
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p.read32(self.phy_regs[0] + 0x4600);
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# MMIO: R.4 0x23c544600 (dptx-phy[0], offset 0x4600) = 0x8000043
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p.read32(self.phy_regs[0] + 0x4600);
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p.write32(self.phy_regs[0] + 0x4600, 0x8000041);
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# MMIO: R.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x482
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p.read32(self.phy_regs[0] + 0x4408);
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p.write32(self.phy_regs[0] + 0x4408, 0x482);
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# MMIO: R.4 0x23c544408 (dptx-phy[0], offset 0x4408) = 0x482
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p.read32(self.phy_regs[0] + 0x4408);
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p.write32(self.phy_regs[0] + 0x4408, 0x483);
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def set_link_rate(self):
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print(f"dptx phy set_link_rate")
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# MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
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p.read32(self.phy_regs[0] + 0x4004);
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p.write32(self.phy_regs[0] + 0x4004, 0x49);
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# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
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p.read32(self.phy_regs[0] + 0x4000);
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p.write32(self.phy_regs[0] + 0x4000, 0x41021ac);
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# MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
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p.read32(self.phy_regs[0] + 0x4004);
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p.write32(self.phy_regs[0] + 0x4004, 0x41);
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# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
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p.read32(self.phy_regs[0] + 0x4000);
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p.write32(self.phy_regs[0] + 0x4000, 0x41021ac);
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# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
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p.read32(self.phy_regs[0] + 0x4000);
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p.write32(self.phy_regs[0] + 0x4000, 0x41021ac);
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# MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
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p.read32(self.phy_regs[0] + 0x2200);
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# MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2002
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p.read32(self.phy_regs[0] + 0x2200);
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p.write32(self.phy_regs[0] + 0x2200, 0x2000);
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# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
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p.read32(self.phy_regs[0] + 0x100c);
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p.write32(self.phy_regs[0] + 0x100c, 0xf000);
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# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
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p.read32(self.phy_regs[0] + 0x100c);
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p.write32(self.phy_regs[0] + 0x100c, 0xf008);
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# MMIO: R.4 0x23c541014 (dptx-phy[0], offset 0x1014) = 0x1
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p.read32(self.phy_regs[0] + 0x1014);
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# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf008
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p.read32(self.phy_regs[0] + 0x100c);
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p.write32(self.phy_regs[0] + 0x100c, 0xf000);
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# MMIO: R.4 0x23c541008 (dptx-phy[0], offset 0x1008) = 0x1
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p.read32(self.phy_regs[0] + 0x1008);
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# MMIO: R.4 0x23c542220 (dptx-phy[0], offset 0x2220) = 0x11090a0
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p.read32(self.phy_regs[0] + 0x2220);
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p.write32(self.phy_regs[0] + 0x2220, 0x1109020);
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# MMIO: R.4 0x23c5420b0 (dptx-phy[0], offset 0x20b0) = 0x1e0e01c2
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p.read32(self.phy_regs[0] + 0x20b0);
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p.write32(self.phy_regs[0] + 0x20b0, 0x1e0e01c2);
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# MMIO: R.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
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p.read32(self.phy_regs[0] + 0x20b4);
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p.write32(self.phy_regs[0] + 0x20b4, 0x7fffffe);
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# MMIO: R.4 0x23c5420b4 (dptx-phy[0], offset 0x20b4) = 0x7fffffe
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p.read32(self.phy_regs[0] + 0x20b4);
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p.write32(self.phy_regs[0] + 0x20b4, 0x7fffffe);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x654800);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x654800);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x654800);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x654800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x454800);
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# MMIO: R.4 0x23c5420b8 (dptx-phy[0], offset 0x20b8) = 0x454800
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p.read32(self.phy_regs[0] + 0x20b8);
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p.write32(self.phy_regs[0] + 0x20b8, 0x454800);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x0
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0x8);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0xc);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0x4000c);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x4000c
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0xc);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0x8000c);
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# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8000c
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p.read32(self.phy_regs[1] + 0xa0);
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p.write32(self.phy_regs[1] + 0xa0, 0xc);
|
||||
# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0xc
|
||||
p.read32(self.phy_regs[1] + 0xa0);
|
||||
p.write32(self.phy_regs[1] + 0xa0, 0x8);
|
||||
# MMIO: R.4 0x23c5000a0 (dptx-phy[1], offset 0xa0) = 0x8
|
||||
p.read32(self.phy_regs[1] + 0xa0);
|
||||
p.write32(self.phy_regs[1] + 0xa0, 0x0);
|
||||
# MMIO: R.4 0x23c542000 (dptx-phy[0], offset 0x2000) = 0x2
|
||||
p.read32(self.phy_regs[0] + 0x2000);
|
||||
p.write32(self.phy_regs[0] + 0x2000, 0x2);
|
||||
# MMIO: R.4 0x23c542018 (dptx-phy[0], offset 0x2018) = 0x0
|
||||
p.read32(self.phy_regs[0] + 0x2018);
|
||||
p.write32(self.phy_regs[0] + 0x2018, 0x0);
|
||||
# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf000
|
||||
p.read32(self.phy_regs[0] + 0x100c);
|
||||
p.write32(self.phy_regs[0] + 0x100c, 0xf007);
|
||||
# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf007
|
||||
p.read32(self.phy_regs[0] + 0x100c);
|
||||
p.write32(self.phy_regs[0] + 0x100c, 0xf00f);
|
||||
# MMIO: R.4 0x23c541014 (dptx-phy[0], offset 0x1014) = 0x38f
|
||||
p.read32(self.phy_regs[0] + 0x1014);
|
||||
# MMIO: R.4 0x23c54100c (dptx-phy[0], offset 0x100c) = 0xf00f
|
||||
p.read32(self.phy_regs[0] + 0x100c);
|
||||
p.write32(self.phy_regs[0] + 0x100c, 0xf007);
|
||||
# MMIO: R.4 0x23c541008 (dptx-phy[0], offset 0x1008) = 0x9
|
||||
p.read32(self.phy_regs[0] + 0x1008);
|
||||
# MMIO: R.4 0x23c542200 (dptx-phy[0], offset 0x2200) = 0x2000
|
||||
p.read32(self.phy_regs[0] + 0x2200);
|
||||
p.write32(self.phy_regs[0] + 0x2200, 0x2002);
|
||||
# MMIO: R.4 0x23c545010 (dptx-phy[0], offset 0x5010) = 0x18003000
|
||||
p.read32(self.phy_regs[0] + 0x5010);
|
||||
p.write32(self.phy_regs[0] + 0x5010, 0x18003000);
|
||||
# MMIO: R.4 0x23c546010 (dptx-phy[0], offset 0x6010) = 0x18003000
|
||||
p.read32(self.phy_regs[0] + 0x6010);
|
||||
p.write32(self.phy_regs[0] + 0x6010, 0x18003000);
|
||||
# MMIO: R.4 0x23c547010 (dptx-phy[0], offset 0x7010) = 0x18003000
|
||||
p.read32(self.phy_regs[0] + 0x7010);
|
||||
p.write32(self.phy_regs[0] + 0x7010, 0x18003000);
|
||||
# MMIO: R.4 0x23c548010 (dptx-phy[0], offset 0x8010) = 0x18003000
|
||||
p.read32(self.phy_regs[0] + 0x8010);
|
||||
p.write32(self.phy_regs[0] + 0x8010, 0x18003000);
|
||||
# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
p.read32(self.phy_regs[0] + 0x4000);
|
||||
p.write32(self.phy_regs[0] + 0x4000, 0x51021ac);
|
||||
# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x51021ac
|
||||
p.read32(self.phy_regs[0] + 0x4000);
|
||||
p.write32(self.phy_regs[0] + 0x4000, 0x71021ac);
|
||||
# MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x41
|
||||
p.read32(self.phy_regs[0] + 0x4004);
|
||||
p.write32(self.phy_regs[0] + 0x4004, 0x49);
|
||||
# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x71021ac
|
||||
p.read32(self.phy_regs[0] + 0x4000);
|
||||
p.write32(self.phy_regs[0] + 0x4000, 0x71021ec);
|
||||
# MMIO: R.4 0x23c544004 (dptx-phy[0], offset 0x4004) = 0x49
|
||||
p.read32(self.phy_regs[0] + 0x4004);
|
||||
p.write32(self.phy_regs[0] + 0x4004, 0x48);
|
||||
|
||||
def set_active_lane_count(self, lanes):
|
||||
print(f"dptx phy set_active_lane_count({lanes})")
|
||||
if lanes == 0:
|
||||
val1 = val2 = 0x300
|
||||
else:
|
||||
val1 = 0x100
|
||||
val2 = 0
|
||||
|
||||
# MMIO: R.4 0x23c544000 (dptx-phy[0], offset 0x4000) = 0x41021ac
|
||||
program = p.read32(self.phy_regs[0] + 0x4000);
|
||||
p.write32(self.phy_regs[0] + 0x4000, program);
|
||||
# MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x5000);
|
||||
p.write32(self.phy_regs[0] + 0x5000, val1);
|
||||
# MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x6000);
|
||||
p.write32(self.phy_regs[0] + 0x6000, val1);
|
||||
# MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x7000);
|
||||
p.write32(self.phy_regs[0] + 0x7000, val1);
|
||||
# MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x8000);
|
||||
p.write32(self.phy_regs[0] + 0x8000, val1);
|
||||
# MMIO: R.4 0x23c545000 (dptx-phy[0], offset 0x5000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x5000);
|
||||
p.write32(self.phy_regs[0] + 0x5000, val2);
|
||||
# MMIO: R.4 0x23c546000 (dptx-phy[0], offset 0x6000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x6000);
|
||||
p.write32(self.phy_regs[0] + 0x6000, val2);
|
||||
# MMIO: R.4 0x23c547000 (dptx-phy[0], offset 0x7000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x7000);
|
||||
p.write32(self.phy_regs[0] + 0x7000, val2);
|
||||
# MMIO: R.4 0x23c548000 (dptx-phy[0], offset 0x8000) = 0x300
|
||||
p.read32(self.phy_regs[0] + 0x8000);
|
||||
p.write32(self.phy_regs[0] + 0x8000, val2);
|
||||
|
||||
if lanes > 0:
|
||||
p.clear32(self.phy_regs[0] + 0x4000, 0x4000000)
|
||||
|
||||
class lpdptx_phy(Phy):
|
||||
|
||||
def activate(self):
|
||||
|
|
@ -501,6 +831,8 @@ print(f"Framebuffer at {u.ba.video.base:#x}")
|
|||
|
||||
p.display_shutdown(DCP_SHUTDOWN_MODE.QUIESCED)
|
||||
|
||||
target_type = u.adt.getprop('target-type')
|
||||
if target_type in ["J474s", "J475c"]: # t6020/t6021
|
||||
dart = DART.from_adt(u, "arm-io/dart-dcp0")
|
||||
disp_dart = DART.from_adt(u, "arm-io/dart-disp0")
|
||||
#disp_dart.dump_all()
|
||||
|
|
@ -514,7 +846,32 @@ if not dcp.dva_offset:
|
|||
dcp.dva_offset = getattr(u.adt["/arm-io/dart-dcp0"], "vm-base", 0)
|
||||
dcp.stream = u.adt["/arm-io/dart-dcp0/mapper-dcp0"].reg
|
||||
|
||||
phy_node = u.adt["/arm-io/lpdptx-phy0"]
|
||||
dp2hdmi_node = u.adt["/arm-io/dp2hdmi-gpio0"]
|
||||
phy_regs = [phy_node.get_reg(0)[0], phy_node.get_reg(1)[0]]
|
||||
phy = lpdptx_phy(phy_regs)
|
||||
|
||||
elif target_type in ["J473"]: # t8112
|
||||
dart = DART.from_adt(u, "arm-io/dart-dcp")
|
||||
disp_dart = DART.from_adt(u, "arm-io/dart-disp0")
|
||||
#disp_dart.dump_all()
|
||||
|
||||
dart.dump_all()
|
||||
|
||||
dcp_addr = u.adt["arm-io/dcp"].get_reg(0)[0]
|
||||
dcp = DCPIBootClient(u, dcp_addr, dart, disp_dart)
|
||||
dcp.dva_offset = getattr(u.adt["/arm-io/dcp"][0], "asc_dram_mask", 0)
|
||||
if not dcp.dva_offset:
|
||||
dcp.dva_offset = getattr(u.adt["/arm-io/dart-dcp"], "vm-base", 0)
|
||||
dcp.stream = u.adt["/arm-io/dart-dcp/mapper-dcp"].reg
|
||||
dcp.dva_offset = 0;
|
||||
|
||||
phy_node = u.adt["/arm-io/dptx-phy"]
|
||||
dp2hdmi_node = u.adt["/arm-io/dp2hdmi-gpio"]
|
||||
phy_regs = [phy_node.get_reg(0)[0], phy_node.get_reg(1)[0]]
|
||||
phy = dptx_phy(phy_regs)
|
||||
else:
|
||||
raise ValueError(target_type)
|
||||
|
||||
print(f"DVA offset: {dcp.dva_offset:#x}")
|
||||
|
||||
|
|
@ -534,14 +891,17 @@ dcp.dptx.wait_for("dcpav0")
|
|||
dcp.dptx.wait_for("dcpdp0")
|
||||
dcp.dpport.wait_for("port0")
|
||||
|
||||
smcep.write32("gP17", 0x800001)
|
||||
smcep.write32("gP19", 0x800001)
|
||||
hdmi_pwr_en_gpio = dp2hdmi_node.getprop('function-hdmi_pwr_en').args[0].to_bytes(4, byteorder='big').decode()
|
||||
dp2hdmi_pwr_en_gpio = dp2hdmi_node.getprop('function-dp2hdmi_pwr_en').args[0].to_bytes(4, byteorder='big').decode()
|
||||
|
||||
phy_node = u.adt["/arm-io/lpdptx-phy0"]
|
||||
phy_regs = [phy_node.get_reg(0)[0], phy_node.get_reg(1)[0]]
|
||||
dcp.dpport.port0.phy = lpdptx_phy(phy_regs)
|
||||
print("connect")
|
||||
dcp.dpport.port0.connectTo(port=0x804, connected=0, unit=0)
|
||||
print(f"dp2hdmi_pwr_enable:{dp2hdmi_pwr_en_gpio} hdmi_pwr_enable:{hdmi_pwr_en_gpio}")
|
||||
smcep.write32(hdmi_pwr_en_gpio, 0x800001)
|
||||
smcep.write32(dp2hdmi_pwr_en_gpio, 0x800001)
|
||||
|
||||
dcp.dpport.port0.phy = phy
|
||||
dfp_endpoint = phy_node.getprop('dp-switch-dfp-endpoint')
|
||||
print(f"connect dfp-endpoint: {dfp_endpoint}")
|
||||
dcp.dpport.port0.connectTo(port=0x800 + dfp_endpoint, connected=0, unit=0)
|
||||
print("request")
|
||||
dcp.dpport.port0.displayRequest()
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue