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memory: Normalize naming of Normal-NC memory attributes

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Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2022-06-19 16:12:16 +09:00
parent ee2949e744
commit c95189ba2e
3 changed files with 10 additions and 10 deletions
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2
src/fb.c
View file

@ -336,7 +336,7 @@ void fb_init(bool clear)
printf("fb init: %dx%d (%d) [s=%d] @%p\n", fb.width, fb.height, fb.depth, fb.stride, fb.hwptr);
mmu_add_mapping(cur_boot_args.video.base, cur_boot_args.video.base, ALIGN_UP(fb.size, 0x4000),
MAIR_IDX_FRAMEBUFFER, PERM_RW);
MAIR_IDX_NORMAL_NC, PERM_RW);
fb.ptr = malloc(fb.size);
memcpy(fb.ptr, fb.hwptr, fb.size);

16
src/memory.c
View file

@ -148,7 +148,7 @@ enum SPRR_val_t {
#define MAIR_SHIFT_NORMAL (MAIR_IDX_NORMAL * 8)
#define MAIR_SHIFT_DEVICE_nGnRnE (MAIR_IDX_DEVICE_nGnRnE * 8)
#define MAIR_SHIFT_DEVICE_nGnRE (MAIR_IDX_DEVICE_nGnRE * 8)
#define MAIR_SHIFT_FRAMEBUFFER (MAIR_IDX_FRAMEBUFFER * 8)
#define MAIR_SHIFT_NORMAL_NC (MAIR_IDX_NORMAL_NC * 8)
/*
* https://developer.arm.com/documentation/ddi0500/e/system-control/aarch64-register-descriptions/memory-attribute-indirection-register--el1
@ -159,9 +159,9 @@ enum SPRR_val_t {
* MAIR_ATTR_DEVICE_nGnRE sets Device-nGnRE memory
*/
#define MAIR_ATTR_NORMAL_DEFAULT 0xffUL
#define MAIR_ATTR_NORMAL_NC 0x44UL
#define MAIR_ATTR_DEVICE_nGnRnE 0x00UL
#define MAIR_ATTR_DEVICE_nGnRE 0x04UL
#define MAIR_ATTR_FRAMEBUFFER 0x44UL
static u64 *mmu_pt_L0;
static u64 *mmu_pt_L1;
@ -367,12 +367,12 @@ static void mmu_remap_ranges(void)
// TODO: is this the right logic?
if ((flags >> 28) == 8) {
printf("MMU: Adding nGnRE mapping at 0x%lx (0x%lx)\n", addr, size);
printf("MMU: Adding Device-nGnRE mapping at 0x%lx (0x%lx)\n", addr, size);
mmu_add_mapping(addr, addr, size, MAIR_IDX_DEVICE_nGnRE, PERM_RW_EL0);
} else if (flags == 0x60004016) {
printf("MMU: Adding UC mapping at 0x%lx (0x%lx)\n", addr, size);
printf("MMU: Adding Normal-NC mapping at 0x%lx (0x%lx)\n", addr, size);
dc_civac_range((void *)addr, size);
mmu_add_mapping(addr, addr, size, MAIR_IDX_FRAMEBUFFER, PERM_RW_EL0);
mmu_add_mapping(addr, addr, size, MAIR_IDX_NORMAL_NC, PERM_RW_EL0);
}
ranges += 6;
@ -381,9 +381,9 @@ static void mmu_remap_ranges(void)
void mmu_map_framebuffer(u64 addr, size_t size)
{
printf("MMU: Adding UC mapping at 0x%lx (0x%zx) for framebuffer\n", addr, size);
printf("MMU: Adding Normal-NC mapping at 0x%lx (0x%zx) for framebuffer\n", addr, size);
dc_civac_range((void *)addr, size);
mmu_add_mapping(addr, addr, size, MAIR_IDX_FRAMEBUFFER, PERM_RW_EL0);
mmu_add_mapping(addr, addr, size, MAIR_IDX_NORMAL_NC, PERM_RW_EL0);
}
static void mmu_add_default_mappings(void)
@ -454,7 +454,7 @@ static void mmu_configure(void)
msr(MAIR_EL1, (MAIR_ATTR_NORMAL_DEFAULT << MAIR_SHIFT_NORMAL) |
(MAIR_ATTR_DEVICE_nGnRnE << MAIR_SHIFT_DEVICE_nGnRnE) |
(MAIR_ATTR_DEVICE_nGnRE << MAIR_SHIFT_DEVICE_nGnRE) |
(MAIR_ATTR_FRAMEBUFFER << MAIR_SHIFT_FRAMEBUFFER));
(MAIR_ATTR_NORMAL_NC << MAIR_SHIFT_NORMAL_NC));
msr(TCR_EL1, FIELD_PREP(TCR_IPS, TCR_IPS_4TB) | FIELD_PREP(TCR_TG1, TCR_TG1_16K) |
FIELD_PREP(TCR_SH1, TCR_SH1_IS) | FIELD_PREP(TCR_ORGN1, TCR_ORGN1_WBWA) |
FIELD_PREP(TCR_IRGN1, TCR_IRGN1_WBWA) | FIELD_PREP(TCR_T1SZ, TCR_T1SZ_48BIT) |

2
src/memory.h
View file

@ -46,7 +46,7 @@
#define MAIR_IDX_NORMAL 0
#define MAIR_IDX_DEVICE_nGnRnE 1
#define MAIR_IDX_DEVICE_nGnRE 2
#define MAIR_IDX_FRAMEBUFFER 3
#define MAIR_IDX_NORMAL_NC 3
#ifndef __ASSEMBLER__