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m1n1.proxyutils: Support sys/sysl ops (e.g. tlbi)
Signed-off-by: Asahi Lina <lina@asahilina.net>
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60d69697d3
commit
bfccbd32e7
1 changed files with 7 additions and 4 deletions
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@ -119,8 +119,8 @@ class ProxyUtils(Reloadable):
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'''read system register reg'''
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op0, op1, CRn, CRm, op2 = sysreg_parse(reg)
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op = (((op0 & 1) << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5300000)
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op = ((op0 << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5200000)
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return self.exec(op, call=call, silent=silent)
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@ -128,11 +128,14 @@ class ProxyUtils(Reloadable):
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'''Write val to system register reg'''
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op0, op1, CRn, CRm, op2 = sysreg_parse(reg)
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op = (((op0 & 1) << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5100000)
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op = ((op0 << 19) | (op1 << 16) | (CRn << 12) |
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(CRm << 8) | (op2 << 5) | 0xd5000000)
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self.exec(op, val, call=call, silent=silent)
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sys = msr
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sysl = mrs
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def exec(self, op, r0=0, r1=0, r2=0, r3=0, *, silent=False, call=None, ignore_exceptions=False):
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if callable(call):
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region = REGION_RX_EL1
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