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https://github.com/AsahiLinux/m1n1
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cpufreq: Correct fixup for M2 devices
Signed-off-by: Hector Martin <marcan@marcan.st>
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parent
a81314fe77
commit
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1 changed files with 18 additions and 4 deletions
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@ -11,7 +11,8 @@
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#define CLUSTER_PSTATE_BUSY BIT(31)
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#define CLUSTER_PSTATE_SET BIT(25)
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#define CLUSTER_PSTATE_UNK BIT(20)
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#define CLUSTER_PSTATE_UNK_M2 BIT(22)
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#define CLUSTER_PSTATE_UNK_M1 BIT(20)
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#define CLUSTER_PSTATE_DESIRED2 GENMASK(16, 12)
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#define CLUSTER_PSTATE_DESIRED1 GENMASK(4, 0)
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@ -62,13 +63,26 @@ void cpufreq_fixup_cluster(const struct cluster_t *cluster)
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{
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u64 val = read64(cluster->base + CLUSTER_PSTATE);
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// Older versions of m1n1 stage 1 erroneously cleared CLUSTER_PSTATE_UNK, so put it back for
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// Older versions of m1n1 stage 1 erroneously cleared CLUSTER_PSTATE_UNK_Mx, so put it back for
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// firmwares it supported (don't touch anything newer, which includes newer devices).
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// Also clear the CLUSTER_PSTATE_DESIRED2 field since it doesn't seem to do anything, and isn't
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// used on newer chips.
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if (os_firmware.version != V_UNKNOWN && os_firmware.version <= V13_3) {
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if (!(val & CLUSTER_PSTATE_UNK) || (val & CLUSTER_PSTATE_DESIRED2)) {
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val |= CLUSTER_PSTATE_UNK;
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u64 bits = 0;
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switch (chip_id) {
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case T8103:
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case T6000 ... T6002:
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bits = CLUSTER_PSTATE_UNK_M1;
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break;
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case T8112:
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case T6020 ... T6021:
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bits = CLUSTER_PSTATE_UNK_M2;
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break;
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default:
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return;
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}
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if (!(val & bits) || (val & CLUSTER_PSTATE_DESIRED2)) {
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val |= bits;
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val &= ~CLUSTER_PSTATE_DESIRED2;
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printf("cpufreq: Correcting setting for cluster %s\n", cluster->name);
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write64(cluster->base + CLUSTER_PSTATE, val);
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