m1n1.fw.agx.initdata: Remove complex creation code

Moving this to its own place

Signed-off-by: Asahi Lina <lina@asahilina.net>
This commit is contained in:
Asahi Lina 2022-05-21 03:41:43 +09:00
parent 891bdd3101
commit ae1a8ad504

View file

@ -1,5 +1,5 @@
from m1n1.utils import *
from m1n1.constructutils import ConstructClass
from m1n1.constructutils import ConstructClass, ConstructValueClass, ROPointer
from construct import *
from .channels import Channels
@ -11,10 +11,6 @@ class InitData_unkptr20(ConstructClass):
Padding(0x70)
)
def __init__(self, heap, shared_heap):
self.unkptr_0 = heap.malloc(0x40)
self.unkptr_8 = heap.malloc(0x40) # totally guessing the size on this one
class RegionB_unkprt_188(ConstructClass):
subcon = Struct(
"unk_0" / Int32ul,
@ -119,13 +115,13 @@ class RegionB_unkprt_1a0(ConstructClass):
"unk_28" / Int32ul,
"unk_2c" / Int32ul,
"unk_30" / Int64ul, # This might be another IO mapping? But it's weird
"unk_38" / Int64ul,
"unkptr_38" / Int64ul,
Padding(0x20),
"unk_data" / Bytes(0x170), # Doesn't seem to be necessary
"unk_data" / HexDump(Bytes(0x170)), # Doesn't seem to be necessary
"io_mappings" / Array(0x14, IOMapping),
)
def __init__(self, heap, shared_heap, info):
def __init__(self):
self.unk_0 = 0
self.unk_4 = 0x13
self.unk_8 = 0
@ -138,11 +134,10 @@ class RegionB_unkprt_1a0(ConstructClass):
self.unk_28 = 0
self.unk_2c = 0x11
self.unk_30 = 0x6f_ffff8000
self.unk_38 = 0xffffffa0_11800000
# unmapped?
self.unkptr_38 = 0xffffffa0_11800000
self.unk_data = b"\0"*0x170
self.io_mappings = info['io_mappings']
class InitData_RegionB(ConstructClass):
subcon = Struct(
@ -152,12 +147,12 @@ class InitData_RegionB(ConstructClass):
"unkptr_178" / Int64ul, # size: 0x1c0, has random negative 1s, Needed for login screen
"unkptr_180" / Int64ul, # size: 0x140, Empty
"unkptr_188_addr" / Int64ul, # size: 0x3b80, few floats, few ints, needed for init
"unkptr_188" / Pointer(this.unkptr_188_addr, RegionB_unkprt_188),
"unkptr_188" / ROPointer(this.unkptr_188_addr, RegionB_unkprt_188),
"unkptr_190" / Int64ul, # size: 0x80, empty
"unkptr_198_addr" / Int64ul, # size: 0xc0, fw writes timestamps into this
"unkptr_198" / Pointer(this.unkptr_198_addr, Bytes(0xc0)),
"unkptr_198" / ROPointer(this.unkptr_198_addr, Bytes(0xc0)),
"unkptr_1a0_addr" / Int64ul, # size: 0xb80, io stuff
"unkptr_1a0" / Pointer(this.unkptr_1a0_addr, RegionB_unkprt_1a0),
"unkptr_1a0" / ROPointer(this.unkptr_1a0_addr, RegionB_unkprt_1a0),
"unkptr_1a8" / Int64ul, # repeat of 1a0
"fwlog_ring2" / Int64ul, #
"unkptr_1b8" / Int64ul, # Unallocated, Size 0x1000
@ -168,24 +163,6 @@ class InitData_RegionB(ConstructClass):
"unkptr_21c" / Int64ul, # Size: 0x4000
)
def __init__(self, heap, shared_heap, info):
self.channels = Channels(heap, shared_heap)
self.unkptr_170 = heap.malloc(0xc0)
self.unkptr_178 = heap.malloc(0x1c0)
self.unkptr_180 = heap.malloc(0x140)
self.unkptr_188_addr = heap.malloc(0x3b80)
self.unkptr_188 = RegionB_unkprt_188()
self.unkptr_190 = heap.malloc(0x80)
self.unkptr_198_addr = heap.malloc(0xc0)
self.unkptr_198 = b"\x25" + b"\x00"*0xbf
self.unkptr_1a0_addr = self.unkptr_1a8 = heap.malloc(0xb80)
self.unkptr_1a0 = RegionB_unkprt_1a0(heap, shared_heap, info)
self.fwlog_ring2 = shared_heap.malloc(0x1000)
self.unkptr_1b8 = heap.malloc(0x1000)
self.unkptr_1c0 = heap.malloc(0x300)
self.unkptr_1c8 = heap.malloc(0x1000)
self.unkptr_214 = self.unkptr_21c = shared_heap.malloc(0x4000)
def mon(self, add_fn):
add_fn(self.unkptr_170, 0x140, "unkptr_170")
add_fn(self.unkptr_178, 0x1c0, "unkptr_178")
@ -226,18 +203,18 @@ class UatLevelInfo(ConstructClass):
self.unk_10 = 0x3ffffffc000
self.index_mask = ((num_entries * 8) - 1) << index_shift
class InitData(ConstructClass):
subcon = Struct(
"unkptr_0" / Int64ul, # allocation size: 0x4000
"regionA_addr" / Int64ul, # allocation size: 0x4000
"regionA" / ROPointer(this.regionA_addr, HexDump(Bytes(12))),
"unk_8" / Default(Int32ul, 0),
"unk_c"/ Default(Int32ul, 0),
"regionB_addr" / Int64ul, # 0xfa00c338000 allocation size: 0x34000
"regionB" / Pointer(this.regionB_addr, InitData_RegionB),
"regionB" / ROPointer(this.regionB_addr, InitData_RegionB),
"regionC_addr" / Int64ul, # 0xfa000200000 allocation size: 0x88000, heap?
"unkptr_20_addr" / Int64ul, # allocation size: 0x4000, but probably only 0x80 bytes long
"unkptr_20" / Pointer(this.unkptr_20_addr, InitData_unkptr20),
"unkptr_20" / ROPointer(this.unkptr_20_addr, InitData_unkptr20),
"uat_num_levels" / Int8ul,
"uat_page_bits" / Int8ul,
"uat_page_size" / Int16ul,
@ -247,32 +224,3 @@ class InitData(ConstructClass):
Padding(0x1000) # For safety
)
def __init__(self, heap, shared_heap, info):
self.unkptr_0 = shared_heap.memalign(0x4000, 0x4000)
self.regionB_addr = heap.malloc(InitData_RegionB.sizeof())
self.regionB = InitData_RegionB(heap, shared_heap, info)
self.regionC_addr = shared_heap.malloc(0x88000)
self.unkptr_20_addr = shared_heap.malloc(InitData_unkptr20.sizeof())
self.unkptr_20 = InitData_unkptr20(heap, shared_heap)
# This section seems to be data that would be used by firmware side page allocation
# But the current firmware doesn't have this functionality enabled, so it's not used?
self.uat_num_levels = 3
self.uat_page_bits = 14
self.uat_page_size = 0x4000
self.uat_level_info = [
UatLevelInfo(36, 8),
UatLevelInfo(25, 2048),
UatLevelInfo(14, 2048)
]
# Since the current firmware doesn't have this functionality enabled, we must enabled host
# mapped firmware allocations
self.host_mapped_fw_allocations = 1