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https://github.com/AsahiLinux/m1n1
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aic: Add trivial AIC scaffolding, move regs to aic_regs.h
Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
parent
18eb02fa92
commit
4b4ae3ab90
6 changed files with 92 additions and 27 deletions
1
Makefile
1
Makefile
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@ -37,6 +37,7 @@ LIBFDT_OBJECTS := $(patsubst %,libfdt/%, \
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OBJECTS := \
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adt.o \
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aic.o \
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bootlogo_128.o bootlogo_256.o \
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chickens.o \
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dart.o \
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37
src/aic.c
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37
src/aic.c
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@ -0,0 +1,37 @@
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/* SPDX-License-Identifier: MIT */
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#include "aic.h"
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#include "adt.h"
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#include "aic_regs.h"
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#include "utils.h"
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u64 aic_base;
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#define MASK_REG(x) (4 * ((x) >> 5))
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#define MASK_BIT(x) BIT((x)&GENMASK(4, 0))
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void aic_init(void)
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{
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int path[8];
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int node = adt_path_offset_trace(adt, "/arm-io/aic", path);
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if (node < 0) {
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printf("AIC node not found!\n");
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return;
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}
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if (adt_get_reg(adt, path, "reg", 0, &aic_base, NULL)) {
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printf("Failed to get AIC reg property!\n");
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return;
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}
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printf("AIC registers @ 0x%lx\n", aic_base);
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}
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void aic_set_sw(int irq, bool active)
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{
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if (active)
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write32(aic_base + AIC_SW_SET + MASK_REG(irq), MASK_BIT(irq));
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else
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write32(aic_base + AIC_SW_CLR + MASK_REG(irq), MASK_BIT(irq));
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}
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13
src/aic.h
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13
src/aic.h
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@ -0,0 +1,13 @@
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/* SPDX-License-Identifier: MIT */
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#ifndef AIC_H
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#define AIC_H
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#include "types.h"
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extern u64 aic_base;
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void aic_init(void);
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void aic_set_sw(int irq, bool active);
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#endif
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36
src/aic_regs.h
Normal file
36
src/aic_regs.h
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@ -0,0 +1,36 @@
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/* SPDX-License-Identifier: MIT */
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#define AIC_INFO 0x0004
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#define AIC_WHOAMI 0x2000
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#define AIC_EVENT 0x2004
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#define AIC_IPI_SEND 0x2008
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#define AIC_IPI_ACK 0x200c
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#define AIC_IPI_MASK_SET 0x2024
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#define AIC_IPI_MASK_CLR 0x2028
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#define AIC_TARGET_CPU 0x3000
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#define AIC_SW_SET 0x4000
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#define AIC_SW_CLR 0x4080
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#define AIC_MASK_SET 0x4100
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#define AIC_MASK_CLR 0x4180
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#define AIC_CPU_IPI_SET(cpu) (0x5008 + ((cpu) << 7))
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#define AIC_CPU_IPI_CLR(cpu) (0x500c + ((cpu) << 7))
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#define AIC_CPU_IPI_MASK_SET(cpu) (0x5024 + ((cpu) << 7))
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#define AIC_CPU_IPI_MASK_CLR(cpu) (0x5028 + ((cpu) << 7))
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#define AIC_INFO_NR_HW GENMASK(15, 0)
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#define AIC_EVENT_TYPE GENMASK(31, 16)
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#define AIC_EVENT_NUM GENMASK(15, 0)
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#define AIC_EVENT_TYPE_HW 1
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#define AIC_EVENT_TYPE_IPI 4
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#define AIC_EVENT_IPI_OTHER 1
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#define AIC_EVENT_IPI_SELF 2
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#define AIC_IPI_SEND_CPU(cpu) BIT(cpu)
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#define AIC_IPI_OTHER BIT(0)
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#define AIC_IPI_SELF BIT(31)
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#define AIC_MAX_HW_NUM (28 * 32)
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28
src/hv_aic.c
28
src/hv_aic.c
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@ -1,24 +1,11 @@
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/* SPDX-License-Identifier: MIT */
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#include "adt.h"
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#include "aic_regs.h"
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#include "hv.h"
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#include "uartproxy.h"
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#include "utils.h"
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#define AIC_INFO 0x0004
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#define AIC_INFO_NR_HW GENMASK(15, 0)
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#define AIC_EVENT 0x2004
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#define AIC_EVENT_TYPE GENMASK(31, 16)
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#define AIC_EVENT_NUM GENMASK(15, 0)
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#define AIC_EVENT_TYPE_HW 1
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#define AIC_EVENT_TYPE_IPI 4
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#define AIC_EVENT_IPI_OTHER 1
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#define AIC_EVENT_IPI_SELF 2
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#define AIC_MAX_HW_NUM (28 * 32)
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#define IRQTRACE_IRQ BIT(0)
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static u64 aic_base;
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@ -88,21 +75,10 @@ bool hv_trace_irq(u32 type, u32 num, u32 count, u32 flags)
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}
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if (!aic_base) {
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static const char path[] = "/arm-io/aic";
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int adt_path[8];
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int node = adt_path_offset_trace(adt, path, adt_path);
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if (node < 0) {
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printf("HV: Error getting %s node\n", path);
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printf("HV: AIC not initialized\n");
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return false;
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}
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if (adt_get_reg(adt, adt_path, "reg", 0, &aic_base, NULL) < 0) {
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printf("HV: Error getting AIC base address.\n");
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return false;
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}
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}
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static bool hooked = false;
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if (aic_base && !hooked) {
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@ -3,6 +3,7 @@
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#include "../config.h"
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#include "adt.h"
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#include "aic.h"
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#include "exception.h"
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#include "fb.h"
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#include "heapblock.h"
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@ -85,6 +86,7 @@ void m1n1_main(void)
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#endif
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print_info();
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aic_init();
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wdt_disable();
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pmgr_init();
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