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https://github.com/AsahiLinux/m1n1
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hv: Log memory attribute & sharability info in mmiotrace
Signed-off-by: Asahi Lina <lina@asahilina.net>
This commit is contained in:
parent
5836db9305
commit
4274c9d74a
5 changed files with 31 additions and 20 deletions
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@ -10,7 +10,9 @@ __all__ = [
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]
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class MMIOTraceFlags(Register32):
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ATTR = 31, 24
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CPU = 23, 16
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SH = 15, 14
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WIDTH = 4, 0
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WRITE = 5
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MULTI = 6
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4
src/hv.h
4
src/hv.h
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@ -10,7 +10,9 @@
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typedef bool(hv_hook_t)(struct exc_info *ctx, u64 addr, u64 *val, bool write, int width);
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#define MMIO_EVT_ATTR GENMASK(31, 24)
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#define MMIO_EVT_CPU GENMASK(23, 16)
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#define MMIO_EVT_SH GENMASK(15, 14)
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#define MMIO_EVT_MULTI BIT(6)
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#define MMIO_EVT_WRITE BIT(5)
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#define MMIO_EVT_WIDTH GENMASK(4, 0)
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@ -54,7 +56,7 @@ int hv_unmap(u64 from, u64 size);
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int hv_map_hw(u64 from, u64 to, u64 size);
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int hv_map_sw(u64 from, u64 to, u64 size);
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int hv_map_hook(u64 from, hv_hook_t *hook, u64 size);
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u64 hv_translate(u64 addr, bool s1only, bool w);
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u64 hv_translate(u64 addr, bool s1only, bool w, u64 *par_out);
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u64 hv_pt_walk(u64 addr);
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bool hv_handle_dabort(struct exc_info *ctx);
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bool hv_pa_write(struct exc_info *ctx, u64 addr, u64 *val, int width);
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@ -58,9 +58,9 @@ static void _hv_exc_proxy(struct exc_info *ctx, uartproxy_boot_reason_t reason,
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u64 entry_time = mrs(CNTPCT_EL0);
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ctx->elr_phys = hv_translate(ctx->elr, false, false);
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ctx->far_phys = hv_translate(ctx->far, false, false);
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ctx->sp_phys = hv_translate(from_el == 0 ? ctx->sp[0] : ctx->sp[1], false, false);
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ctx->elr_phys = hv_translate(ctx->elr, false, false, NULL);
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ctx->far_phys = hv_translate(ctx->far, false, false, NULL);
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ctx->sp_phys = hv_translate(from_el == 0 ? ctx->sp[0] : ctx->sp[1], false, false, NULL);
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ctx->extra = extra;
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struct uartproxy_msg_start start = {
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36
src/hv_vm.c
36
src/hv_vm.c
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@ -381,7 +381,7 @@ int hv_map_hook(u64 from, hv_hook_t *hook, u64 size)
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return hv_map(from, ((u64)hook) | FIELD_PREP(SPTE_TYPE, SPTE_HOOK), size, 0);
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}
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u64 hv_translate(u64 addr, bool s1, bool w)
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u64 hv_translate(u64 addr, bool s1, bool w, u64 *par_out)
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{
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if (!(mrs(SCTLR_EL12) & SCTLR_M))
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return addr; // MMU off
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@ -416,6 +416,8 @@ u64 hv_translate(u64 addr, bool s1, bool w)
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}
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u64 par = mrs(PAR_EL1);
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if (par_out)
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*par_out = par;
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msr(PAR_EL1, save);
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if (par & PAR_F) {
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@ -927,13 +929,15 @@ bool hv_pa_rw(struct exc_info *ctx, u64 addr, u64 *val, bool write, int width)
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}
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static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64 ipa, u64 *val,
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bool is_write, u64 width, u64 elr)
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bool is_write, u64 width, u64 elr, u64 par)
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{
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assert(pte);
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assert(((ipa & 0x3fff) + (1 << width)) <= 0x4000);
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u64 target = pte & PTE_TARGET_MASK_L4;
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u64 paddr = target | (vaddr & MASK(VADDR_L4_OFFSET_BITS));
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u64 flags = FIELD_PREP(MMIO_EVT_ATTR, FIELD_GET(PAR_ATTR, par)) |
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FIELD_PREP(MMIO_EVT_SH, FIELD_GET(PAR_SH, par));
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// For split ops, treat hardware mapped pages as SPTE_MAP
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if (IS_HW(pte))
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@ -944,7 +948,7 @@ static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64
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hv_wdt_breadcrumb('3');
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if (pte & SPTE_TRACE_WRITE)
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emit_mmiotrace(elr, ipa, val, width, MMIO_EVT_WRITE, pte & SPTE_TRACE_UNBUF);
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emit_mmiotrace(elr, ipa, val, width, flags | MMIO_EVT_WRITE, pte & SPTE_TRACE_UNBUF);
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hv_wdt_breadcrumb('4');
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@ -972,7 +976,7 @@ static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64
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case SPTE_PROXY_HOOK_W: {
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hv_wdt_breadcrumb('7');
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struct hv_vm_proxy_hook_data hook = {
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.flags = FIELD_PREP(MMIO_EVT_WIDTH, width) | MMIO_EVT_WRITE,
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.flags = FIELD_PREP(MMIO_EVT_WIDTH, width) | MMIO_EVT_WRITE | flags,
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.id = FIELD_GET(PTE_TARGET_MASK_L4, pte),
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.addr = ipa,
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.data = {0},
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@ -1011,7 +1015,7 @@ static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64
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case SPTE_PROXY_HOOK_R: {
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hv_wdt_breadcrumb('6');
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struct hv_vm_proxy_hook_data hook = {
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.flags = FIELD_PREP(MMIO_EVT_WIDTH, width),
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.flags = FIELD_PREP(MMIO_EVT_WIDTH, width) | flags,
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.id = FIELD_GET(PTE_TARGET_MASK_L4, pte),
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.addr = ipa,
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};
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@ -1026,7 +1030,7 @@ static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64
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hv_wdt_breadcrumb('7');
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if (pte & SPTE_TRACE_READ)
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emit_mmiotrace(elr, ipa, val, width, 0, pte & SPTE_TRACE_UNBUF);
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emit_mmiotrace(elr, ipa, val, width, flags, pte & SPTE_TRACE_UNBUF);
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}
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hv_wdt_breadcrumb('*');
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@ -1035,7 +1039,7 @@ static bool hv_emulate_rw_aligned(struct exc_info *ctx, u64 pte, u64 vaddr, u64
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}
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static bool hv_emulate_rw(struct exc_info *ctx, u64 pte, u64 vaddr, u64 ipa, u8 *val, bool is_write,
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u64 bytes, u64 elr)
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u64 bytes, u64 elr, u64 par)
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{
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u64 aval[HV_MAX_RW_WORDS];
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memset(aval, 0, sizeof(aval));
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@ -1105,7 +1109,8 @@ bool hv_handle_dabort(struct exc_info *ctx)
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bool is_write = esr & ESR_ISS_DABORT_WnR;
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u64 far = hv_get_far();
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u64 ipa = hv_translate(far, true, is_write);
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u64 par;
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u64 ipa = hv_translate(far, true, is_write, &par);
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dprintf("hv_handle_abort(): stage 1 0x%0lx -> 0x%lx\n", far, ipa);
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@ -1138,7 +1143,7 @@ bool hv_handle_dabort(struct exc_info *ctx)
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assert(IS_SW(pte));
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u64 elr = ctx->elr;
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u64 elr_pa = hv_translate(elr, false, false);
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u64 elr_pa = hv_translate(elr, false, false, NULL);
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if (!elr_pa) {
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printf("HV: Failed to fetch instruction for data abort at 0x%lx\n", elr);
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return false;
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@ -1186,7 +1191,7 @@ bool hv_handle_dabort(struct exc_info *ctx)
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return false;
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}
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if (!hv_emulate_rw(ctx, pte, vaddr, ipa, val, is_write, bytes, elr))
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if (!hv_emulate_rw(ctx, pte, vaddr, ipa, val, is_write, bytes, elr, par))
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return false;
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} else {
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// Oops, we're straddling a page boundary
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@ -1211,7 +1216,8 @@ bool hv_handle_dabort(struct exc_info *ctx)
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vaddr2 = vaddr;
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}
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u64 ipa2 = hv_translate(vaddr2, true, esr & ESR_ISS_DABORT_WnR);
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u64 par2;
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u64 ipa2 = hv_translate(vaddr2, true, esr & ESR_ISS_DABORT_WnR, &par2);
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if (!ipa2) {
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printf("HV: %s half stage 1 translation failed at VA 0x%0lx\n", other, vaddr2);
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return false;
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@ -1235,15 +1241,15 @@ bool hv_handle_dabort(struct exc_info *ctx)
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bool upper_ret;
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if (far == vaddr) {
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if (!hv_emulate_rw(ctx, pte, vaddr, ipa, val, is_write, off, elr))
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if (!hv_emulate_rw(ctx, pte, vaddr, ipa, val, is_write, off, elr, par))
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return false;
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upper_ret =
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hv_emulate_rw(ctx, pte2, vaddr2, ipa2, val + off, is_write, bytes - off, elr);
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hv_emulate_rw(ctx, pte2, vaddr2, ipa2, val + off, is_write, bytes - off, elr, par2);
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} else {
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if (!hv_emulate_rw(ctx, pte2, vaddr2, ipa2, val, is_write, off, elr))
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if (!hv_emulate_rw(ctx, pte2, vaddr2, ipa2, val, is_write, off, elr, par2))
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return false;
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upper_ret =
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hv_emulate_rw(ctx, pte, vaddrp1, ipa, val + off, is_write, bytes - off, elr);
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hv_emulate_rw(ctx, pte, vaddrp1, ipa, val + off, is_write, bytes - off, elr, par);
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}
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if (!upper_ret) {
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@ -446,7 +446,8 @@ int proxy_process(ProxyRequest *request, ProxyReply *reply)
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hv_start((void *)request->args[0], &request->args[1]);
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break;
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case P_HV_TRANSLATE:
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reply->retval = hv_translate(request->args[0], request->args[1], request->args[2]);
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reply->retval = hv_translate(request->args[0], request->args[1], request->args[2],
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(void *)request->args[3]);
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break;
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case P_HV_PT_WALK:
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reply->retval = hv_pt_walk(request->args[0]);
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