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Bring T6020 support up to parity with T6021
Missing smp/cpufreq/soc stuff. Signed-off-by: Hector Martin <marcan@marcan.st>
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parent
06884b5613
commit
41aac76fff
3 changed files with 14 additions and 11 deletions
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@ -70,13 +70,6 @@ static const struct cluster_t t6000_clusters[] = {
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{},
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};
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static const struct cluster_t t6021_clusters[] = {
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{"ECPU0", 0x210e20000, false, 5},
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{"PCPU0", 0x211e20000, false, 6},
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{"PCPU1", 0x212e20000, false, 6},
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{},
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};
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static const struct cluster_t t6002_clusters[] = {
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{"ECPU0", 0x0210e20000, false, 5},
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{"PCPU0", 0x0211e20000, false, 7},
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@ -93,6 +86,13 @@ static const struct cluster_t t8112_clusters[] = {
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{},
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};
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static const struct cluster_t t6020_clusters[] = {
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{"ECPU0", 0x210e20000, false, 5},
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{"PCPU0", 0x211e20000, false, 6},
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{"PCPU1", 0x212e20000, false, 6},
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{},
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};
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int cpufreq_init(void)
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{
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printf("cpufreq: Initializing clusters\n");
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@ -110,8 +110,9 @@ int cpufreq_init(void)
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case T6002:
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cluster = t6002_clusters;
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break;
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case T6020:
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case T6021:
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cluster = t6021_clusters;
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cluster = t6020_clusters;
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break;
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case T8112:
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cluster = t8112_clusters;
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@ -12,7 +12,7 @@
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#define CPU_START_OFF_T8103 0x54000
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#define CPU_START_OFF_T8112 0x34000
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#define CPU_START_OFF_T6021 0x28000
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#define CPU_START_OFF_T6020 0x28000
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#define CPU_REG_CORE GENMASK(7, 0)
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#define CPU_REG_CLUSTER GENMASK(10, 8)
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@ -162,8 +162,9 @@ void smp_start_secondaries(void)
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case T8112:
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cpu_start_off = CPU_START_OFF_T8112;
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break;
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case T6020:
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case T6021:
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cpu_start_off = CPU_START_OFF_T6021;
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cpu_start_off = CPU_START_OFF_T6020;
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break;
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default:
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printf("CPU start offset is unknown for this SoC!\n");
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@ -10,13 +10,14 @@
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#define T6000 0x6000
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#define T6001 0x6001
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#define T6002 0x6002
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#define T6020 0x6020
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#define T6021 0x6021
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#ifdef TARGET
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#if TARGET == T8103
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#define EARLY_UART_BASE 0x235200000
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#elif TARGET == T6000 || TARGET == T6001 || TARGET == T6002 || TARGET == T6021
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#elif TARGET == T6000 || TARGET == T6001 || TARGET == T6002 || TARGET == T6020 || TARGET == T6021
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#define EARLY_UART_BASE 0x39b200000
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#elif TARGET == T8112
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#define EARLY_UART_BASE 0x235200000
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