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pcie: Wait for port PHY to be idle after init before configuring

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Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2021-12-02 13:42:19 +09:00
parent 9949689a74
commit 26b55d4b26
1 changed files with 8 additions and 0 deletions
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8
src/pcie.c
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@ -46,6 +46,9 @@
/* Port registers */
#define APCIE_PORT_LINKSTS 0x208
#define APCIE_PORT_LINKSTS_BUSY BIT(2)
#define APCIE_PORT_APPCLK 0x800
#define APCIE_PORT_APPCLK_EN BIT(0)
@ -269,6 +272,11 @@ int pcie_init(void)
return -1;
}
if (poll32(port_base[port] + APCIE_PORT_LINKSTS, APCIE_PORT_LINKSTS_BUSY, 0, 250000)) {
printf("pcie: Port failed to become idle on %s\n", bridge);
return -1;
}
/* Make Designware PCIe Core registers writable. */
set32(config_base + DWC_DBI_RO_WR, DWC_DBI_RO_WR_EN);