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kboot: Move MCC cache enable to kboot

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Following the general "do more in stage2/kboot, do less in stage1/proxy"
rule. In case something goes wrong here we want to be able to fix it in
stage2.

Thanks to the stupid bug, the past year+ of stage1 installs has had this
codepath disabled, so that works well with this change.

Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2023-09-05 23:31:25 +09:00
parent 655299382d
commit 24a3a0d962
3 changed files with 18 additions and 7 deletions
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2
src/kboot.c
View file

@ -11,6 +11,7 @@
#include "exception.h" #include "exception.h"
#include "firmware.h" #include "firmware.h"
#include "malloc.h" #include "malloc.h"
#include "mcc.h"
#include "memory.h" #include "memory.h"
#include "pcie.h" #include "pcie.h"
#include "pmgr.h" #include "pmgr.h"
@ -2124,6 +2125,7 @@ int kboot_prepare_dt(void *fdt)
int kboot_boot(void *kernel) int kboot_boot(void *kernel)
{ {
mcc_enable_cache();
tunables_apply_static(); tunables_apply_static();
clk_init(); clk_init();

22
src/mcc.c
View file

@ -127,19 +127,31 @@ static int plane_poll32(int mcc, int plane, u64 offset, u32 mask, u32 target, u3
target, timeout); target, timeout);
} }
static void mcc_enable_cache(void) int mcc_enable_cache(void)
{ {
int ret = 0;
if (!mcc_initialized)
return -1;
for (int mcc = 0; mcc < mcc_count; mcc++) { for (int mcc = 0; mcc < mcc_count; mcc++) {
for (int plane = 0; plane < mcc_regs[mcc].plane_count; plane++) { for (int plane = 0; plane < mcc_regs[mcc].plane_count; plane++) {
plane_write32(mcc, plane, PLANE_CACHE_ENABLE, mcc_regs[mcc].cache_enable_val); plane_write32(mcc, plane, PLANE_CACHE_ENABLE, mcc_regs[mcc].cache_enable_val);
if (plane_poll32(mcc, plane, PLANE_CACHE_STATUS, mcc_regs[mcc].cache_status_mask, if (plane_poll32(mcc, plane, PLANE_CACHE_STATUS, mcc_regs[mcc].cache_status_mask,
mcc_regs[mcc].cache_status_val, CACHE_ENABLE_TIMEOUT)) mcc_regs[mcc].cache_status_val, CACHE_ENABLE_TIMEOUT)) {
printf("MCC: timeout while enabling cache for MCC %d plane %d: 0x%x\n", mcc, plane, printf("MCC: timeout while enabling cache for MCC %d plane %d: 0x%x\n", mcc, plane,
plane_read32(mcc, plane, PLANE_CACHE_STATUS)); plane_read32(mcc, plane, PLANE_CACHE_STATUS));
else if (mcc_regs[mcc].cache_disable) ret = -1;
} else if (mcc_regs[mcc].cache_disable) {
plane_write32(mcc, plane, mcc_regs[mcc].cache_disable, 0); plane_write32(mcc, plane, mcc_regs[mcc].cache_disable, 0);
}
} }
} }
if (!ret)
printf("MCC: System level cache enabled\n");
return ret;
} }
int mcc_unmap_carveouts(void) int mcc_unmap_carveouts(void)
@ -219,8 +231,6 @@ int mcc_init_t8103(int node, int *path, bool t8112)
mcc_regs[0].cache_disable = t8112 ? T8112_CACHE_DISABLE : 0; mcc_regs[0].cache_disable = t8112 ? T8112_CACHE_DISABLE : 0;
mcc_regs[0].tz = &t8103_tz_regs; mcc_regs[0].tz = &t8103_tz_regs;
mcc_enable_cache();
printf("MCC: Initialized T8103 MCC (%d channels)\n", val); printf("MCC: Initialized T8103 MCC (%d channels)\n", val);
mcc_initialized = true; mcc_initialized = true;
@ -273,8 +283,6 @@ int mcc_init_t6000(int node, int *path, bool t602x)
mcc_regs[i].tz = t602x ? &t602x_tz_regs : &t8103_tz_regs; mcc_regs[i].tz = t602x ? &t602x_tz_regs : &t8103_tz_regs;
} }
mcc_enable_cache();
printf("MCC: Initialized T%x MCCs (%d instances, %d planes, %d channels)\n", printf("MCC: Initialized T%x MCCs (%d instances, %d planes, %d channels)\n",
t602x ? 0x6020 : 0x6000, mcc_count, mcc_regs[0].plane_count, mcc_regs[0].dcs_count); t602x ? 0x6020 : 0x6000, mcc_count, mcc_regs[0].plane_count, mcc_regs[0].dcs_count);

1
src/mcc.h
View file

@ -15,5 +15,6 @@ extern struct mcc_carveout mcc_carveouts[];
int mcc_init(void); int mcc_init(void);
int mcc_unmap_carveouts(void); int mcc_unmap_carveouts(void);
int mcc_enable_cache(void);
#endif #endif