From 1c7131e26de5e23362dc778d89203443ea0ddd44 Mon Sep 17 00:00:00 2001 From: Asahi Lina Date: Wed, 19 Apr 2023 15:25:23 +0900 Subject: [PATCH] m1n1.agx: T602x rendering changes Too lazy to split this up... Signed-off-by: Asahi Lina --- proxyclient/m1n1/agx/__init__.py | 31 +- proxyclient/m1n1/agx/context.py | 12 + proxyclient/m1n1/agx/initdata.py | 5 +- proxyclient/m1n1/agx/object.py | 4 +- proxyclient/m1n1/agx/render.py | 471 +++++++++++++++++------ proxyclient/m1n1/fw/agx/channels.py | 23 +- proxyclient/m1n1/fw/agx/cmdqueue.py | 14 +- proxyclient/m1n1/fw/agx/initdata.py | 50 ++- proxyclient/m1n1/fw/agx/microsequence.py | 119 +++--- proxyclient/m1n1/hw/agx.py | 34 +- 10 files changed, 533 insertions(+), 230 deletions(-) diff --git a/proxyclient/m1n1/agx/__init__.py b/proxyclient/m1n1/agx/__init__.py index 7dd0c88d..2e23db7b 100644 --- a/proxyclient/m1n1/agx/__init__.py +++ b/proxyclient/m1n1/agx/__init__.py @@ -32,7 +32,10 @@ class AGX: self.asc_dev = u.adt["/arm-io/gfx-asc"] self.sgx_dev = u.adt["/arm-io/sgx"] - self.sgx = SGXRegs(u, self.sgx_dev.get_reg(0)[0]) + if self.sgx_dev.compatible[0] in ("gpu,t6020", "gpu,t6021"): + self.sgx = SGXRegsT602X(u, self.sgx_dev.get_reg(0)[0]) + else: + self.sgx = SGXRegs(u, self.sgx_dev.get_reg(0)[0]) self.log("Initializing allocations") @@ -60,16 +63,25 @@ class AGX: self.kobj = GPUAllocator(self, "kernel", self.kern_va_base, 0x20000000, - AttrIndex=MemoryAttr.Shared, AP=1, guard_pages=1) + AttrIndex=MemoryAttr.Shared, AP=1, guard_pages=16) self.cmdbuf = GPUAllocator(self, "cmdbuf", self.kern_va_base + 0x20000000, 0x20000000, - AttrIndex=MemoryAttr.Shared, AP=0, guard_pages=1) + AttrIndex=MemoryAttr.Shared, AP=1, UXN=1, PXN=1, guard_pages=16) self.kshared = GPUAllocator(self, "kshared", self.kern_va_base + 0x40000000, 0x20000000, - AttrIndex=MemoryAttr.Shared, AP=1, guard_pages=1) + AttrIndex=MemoryAttr.Shared, AP=1, guard_pages=16) self.kshared2 = GPUAllocator(self, "kshared2", self.kern_va_base + 0x60000000, 0x100000, - AttrIndex=MemoryAttr.Shared, AP=0, PXN=1, guard_pages=1) + AttrIndex=MemoryAttr.Shared, AP=0, PXN=1, guard_pages=16) + self.kgpurw = GPUAllocator(self, "kernel GPU RW", + self.kern_va_base + 0x70000000, 0x1000000, + AttrIndex=MemoryAttr.Shared, AP=0, UXN=1, PXN=1) + + self.klow = GPUAllocator(self, "kernel_low", + 0x1500000000, 0x100000, + AttrIndex=MemoryAttr.Shared, AP=0, UXN=1, PXN=1) + self.klow.align_to_end = False + self.io_allocator = Heap(self.kern_va_base + 0x68000000, self.kern_va_base + 0x70000000, @@ -266,10 +278,15 @@ class AGX: if not fault_info.FAULTED: return - fault_addr = fault_info.ADDR + fault_addr = getattr(self.sgx, "FAULT_ADDR", None).val + if fault_addr is not None: + fault_addr <<= 6 + else: + fault_addr = fault_info.ADDR + if fault_addr & 0x8000000000: fault_addr |= 0xffffff8000000000 - base, obj = self.find_object(fault_addr) + base, obj = self.find_object(fault_addr, ctx=fault_info.CONTEXT) info = "" if obj is not None: info = f" ({obj!s} + {fault_addr - base:#x})" diff --git a/proxyclient/m1n1/agx/context.py b/proxyclient/m1n1/agx/context.py index 9e7ddc1c..1898b35f 100644 --- a/proxyclient/m1n1/agx/context.py +++ b/proxyclient/m1n1/agx/context.py @@ -206,8 +206,14 @@ class GPUBufferManager: self.pages_per_block = 4 self.block_size = self.pages_per_block * self.page_size + self.scene_max = 48 + self.page_list = context.uobj.new(Array(0x10000 // 4, Int32ul), "BM PageList", track=False) self.block_list = context.uobj.new(Array(0x8000 // 4, Int32ul), "BM BlockList", track=False) + self.scene_list = agx.kgpurw.new(Array(self.scene_max, Int32ul), "BM SceneList", track=True) + + self.scene_list.val = [0] * 48 + self.scene_list.push() self.info = info = agx.kobj.new(BufferManagerInfo) info.page_list_addr = self.page_list._addr @@ -227,8 +233,14 @@ class GPUBufferManager: self.block_list.push() self.page_list.push() + self.scene_idx = 0 + info.push() + def get_scene(self): + self.scene_idx = (self.scene_idx + 1) % self.scene_max + return self.scene_list._addr + self.scene_idx * 4 + def increment(self): self.counter_obj.count += 1 self.counter_obj.push() diff --git a/proxyclient/m1n1/agx/initdata.py b/proxyclient/m1n1/agx/initdata.py index cb95d7fa..b66cb0c0 100644 --- a/proxyclient/m1n1/agx/initdata.py +++ b/proxyclient/m1n1/agx/initdata.py @@ -366,8 +366,9 @@ def build_initdata(agx): # size: 0x180, Empty # 13.0: grew + # 13.3: grew again #regionB.stats_cp = agx.kobj.new_buf(0x180, "RegionB.unkptr_180").push() - regionB.stats_cp = agx.kobj.new_buf(0x980, "RegionB.unkptr_180").push() + regionB.stats_cp = agx.kobj.new_buf(0x980 + 0x800, "RegionB.stats_cp").push() # size: 0x3b80, few floats, few ints, needed for init regionB.hwdata_a = agx.kobj.new(AGXHWDataA(sgx, chip_info), track=False) @@ -446,7 +447,7 @@ def build_initdata(agx): regionB.unk_1c8 = agx.kobj.new_buf(0x1000, "RegionB.unkptr_1c8").push() # Size: 0x4000 - regionB.buffer_mgr_ctl = agx.kobj.new(InitData_BufferMgrCtl, track=True).push() + regionB.buffer_mgr_ctl = agx.klow.new(InitData_BufferMgrCtl, track=True).push() regionB.buffer_mgr_ctl_gpu_addr = regionB.buffer_mgr_ctl._addr regionB.unk_6a80 = 0 diff --git a/proxyclient/m1n1/agx/object.py b/proxyclient/m1n1/agx/object.py index 8f382f94..34333d18 100644 --- a/proxyclient/m1n1/agx/object.py +++ b/proxyclient/m1n1/agx/object.py @@ -195,7 +195,7 @@ class GPUAllocator: def make_stream(self, base): return self.agx.uat.iostream(self.ctx, base, recurse=False) - def new(self, objtype, name=None, track=True, **kwargs): + def new(self, objtype, name=None, track=True, align=1, **kwargs): obj = GPUObject(self, objtype) obj._stream = self.make_stream if name is not None: @@ -208,7 +208,7 @@ class GPUAllocator: paddr = self.agx.u.memalign(self.page_size, size_align) off = 0 if self.align_to_end: - off = size_align - obj._size + off = size_align - align_up(obj._size, align) flags = dict(self.flags) flags.update(kwargs) diff --git a/proxyclient/m1n1/agx/render.py b/proxyclient/m1n1/agx/render.py index 3d68a24f..c50ca13a 100644 --- a/proxyclient/m1n1/agx/render.py +++ b/proxyclient/m1n1/agx/render.py @@ -238,14 +238,18 @@ class GPURenderer: deflake_2_size = 0x280 deflake_3_size = 0x20 + # 4 * 0x40 on M2 Max? + if Ver.check("G >= G14X"): + deflake_3_size = 0x40 + # t6002 - 9 times larger instead of 8? works with 8... deflake_1_size *= nclusters deflake_2_size *= nclusters deflake_3_size *= nclusters - deflake_1 = self.ctx.uobj.new_buf(deflake_1_size, "Deflake 1", track=True) - deflake_2 = self.ctx.uobj.new_buf(deflake_2_size, "Deflake 2", track=True) - deflake_3 = self.ctx.uobj.new_buf(deflake_3_size, "Deflake 3", track=True) + deflake_1 = self.ctx.uobj.new_buf(deflake_1_size, "Deflake 1", track=False) + deflake_2 = self.ctx.uobj.new_buf(deflake_2_size, "Deflake 2", track=False) + deflake_3 = self.ctx.uobj.new_buf(deflake_3_size, "Deflake 3", track=False) work.add(deflake_1) work.add(deflake_2) work.add(deflake_3) @@ -347,13 +351,13 @@ class GPURenderer: tpc_size = tpc_entry_size * tmtiles_x * tmtiles_y * nclusters if self.tpc_size < tpc_size: - self.tpc = ctx.uobj.new_buf(tpc_size, "TPC", track=True).push() + self.tpc = ctx.uobj.new_buf(tpc_size, "TPC", track=False).push() self.tpc_size = tpc_size depth_aux_buffer_addr = 0 if cmdbuf.depth_buffer: size = align_pot(max(width, tile_width)) * align_pot(max(height, tile_width)) // 32 - depth_aux_buffer = self.ctx.uobj.new_buf(size, "Depth Aux", track=True) + depth_aux_buffer = self.ctx.uobj.new_buf(size, "Depth Aux", track=False) work.add(depth_aux_buffer) depth_aux_buffer_addr = depth_aux_buffer._addr @@ -366,7 +370,7 @@ class GPURenderer: #tvb_tilemap_size = 0x80 * mtile_stride tvb_tilemap_size = tilemap_size - tvb_tilemap = ctx.uobj.new_buf(tvb_tilemap_size, "TVB Tilemap", track=True).push() + tvb_tilemap = ctx.uobj.new_buf(tvb_tilemap_size, "TVB Tilemap", track=False).push() work.tvb_tilemap_size = tvb_tilemap_size work.tvb_tilemap = tvb_tilemap work.add(tvb_tilemap) @@ -377,14 +381,18 @@ class GPURenderer: tvb_heapmeta = ctx.uobj.new_buf(tvb_heapmeta_size, "TVB Heap Meta", track=False).push() work.add(tvb_heapmeta) - unk_tile_buf1 = self.ctx.uobj.new_buf(tvb_tilemap_size * nclusters, "Unk tile buf 1", track=True) + unk_tile_buf1 = self.ctx.uobj.new_buf(tvb_tilemap_size * nclusters, "Unk tile buf 1", track=False) print("tvb_tilemap_size", hex(tvb_tilemap_size)) - unk_tile_buf2 = self.ctx.uobj.new_buf(0x4 * nclusters, "Unk tile buf 2", track=True) + unk_tile_buf2 = self.ctx.uobj.new_buf(0x4 * nclusters, "Unk tile buf 2", track=False) #size = 0xc0 * nclusters size = 0xc80 - unk_tile_buf3 = self.ctx.uobj.new_buf(size, "Unk tile buf 3", track=True) - unk_tile_buf4 = self.ctx.uobj.new_buf(0x280 * nclusters, "Unk tile buf 4", track=True) - unk_tile_buf5 = self.ctx.uobj.new_buf(0x30 * nclusters, "Unk tile buf 5", track=True) + unk_tile_buf3 = self.ctx.uobj.new_buf(size, "Unk tile buf 3", track=False) + f4 = 0x280 + #f4 = 0x400 # t602x? + unk_tile_buf4 = self.ctx.uobj.new_buf(f4 * nclusters, "Unk tile buf 4", track=False) + f5 = 0x30 + #f5 = 0x980 + unk_tile_buf5 = self.ctx.uobj.new_buf(f5 * nclusters, "Unk tile buf 5", track=False) work.add(unk_tile_buf1) work.add(unk_tile_buf2) work.add(unk_tile_buf3) @@ -394,16 +402,19 @@ class GPURenderer: ##### Buffer stuff? # buffer related? - bufferthing_buf = ctx.uobj.new_buf(0x80, "BufferThing.unkptr_18", track=True) + bufferthing_buf = ctx.uobj.new_buf(0x80, "BufferThing.unkptr_18", track=False) work.add(bufferthing_buf) work.buf_desc = buf_desc = agx.kobj.new(BufferThing, track=False) work.add(buf_desc) + buf_desc.unk0_addr = self.buffer_mgr.get_scene() + buf_desc.unk0_addr2 = buf_desc.unk0_addr buf_desc.unk_0 = 0x0 buf_desc.unk_8 = 0x0 buf_desc.unk_10 = 0x0 buf_desc.unkptr_18 = bufferthing_buf._addr buf_desc.unk_20 = 0x0 + buf_desc.unk_28 = 0x0 buf_desc.bm_misc_addr = self.buffer_mgr.misc_obj._addr buf_desc.unk_2c = 0x0 buf_desc.unk_30 = 0x0 @@ -420,7 +431,7 @@ class GPURenderer: ##### 3D barrier command - barrier_cmd = agx.kobj.new(WorkCommandBarrier, track=False) + barrier_cmd = agx.kobj.new(WorkCommandBarrier, track=False, align=0x20) work.add(barrier_cmd) barrier_cmd.stamp = self.stamp_ta2 barrier_cmd.wait_value = self.stamp_value_ta @@ -432,9 +443,36 @@ class GPURenderer: self.wq_3d.submit(barrier_cmd) + process_empty_tiles = True + no_clear_pipeline_textures = True + msaa_zs = False + + unk1 = False + + samples = 1 + layers = 1 + tile_config = 0x10000 + if not unk1: + tile_config |= 0x280 + if layers > 1: + tile_config |= 1 + if process_empty_tiles: + tile_config |= 0x10000 + + utile_config = 0xa000 | {1:0, 2:1, 4:2}[samples] + ppp_multisamplectl = 0x88 + + iogpu_unk_214 = 0xc000 + + tib_blocks = 8 + large_tib = tib_blocks > 8 + set_when_reloading_z_or_s = False + + TAN_60 = 1.732051 + ##### 3D execution - work.wc_3d = wc_3d = agx.kobj.new(WorkCommand3D, track=False) + work.wc_3d = wc_3d = agx.cmdbuf.new(WorkCommand3D, track=False, align=0x20) work.add(work.wc_3d) wc_3d.counter = 0 wc_3d.context_id = self.ctx_id @@ -444,14 +482,13 @@ class GPURenderer: wc_3d.buf_thing = buf_desc wc_3d.unk_emptybuf_addr = self.unk_emptybuf._addr wc_3d.tvb_tilemap = tvb_tilemap._addr - wc_3d.unk_40 = 0x88 - wc_3d.unk_48 = 0x1 + wc_3d.unk_40 = ppp_multisamplectl + wc_3d.unk_48 = samples wc_3d.tile_blocks_y = mtile_y1 wc_3d.tile_blocks_x = mtile_x1 wc_3d.unk_50 = 0x0 wc_3d.unk_58 = 0x0 - TAN_60 = 1.732051 wc_3d.merge_upper_x = TAN_60 / width wc_3d.merge_upper_y = TAN_60 / height wc_3d.unk_68 = 0x0 @@ -477,35 +514,16 @@ class GPURenderer: wc_3d.unk_928_4 = 0 wc_3d.unk_ts = TimeStamp() - # cmdbuf.ds_flags - # 0 - no depth - # 0x80000 - depth store enable - # 0x08000 - depth load enable - - # 0x00044 - compressed depth - - # 0x40000 - stencil store enable - # 0x04000 - stencil load enable - # 0x00110 - compressed stencil - - # Z store format - # 0x4000000 - Depth16Unorm - - # For Depth16Unorm: 0x40000 here also - # AFBI.[ 0. 4] unk1 = 0x4c000 - - # ASAHI_CMDBUF_SET_WHEN_RELOADING_Z_OR_S - # Actually set when loading *and* storing Z, OR loading *and* storing S + use_registers = Ver.check("G >= G14X") # Structures embedded in WorkCommand3D - if True: + if not use_registers: wc_3d.struct_1 = Start3DStruct1() wc_3d.struct_1.store_pipeline_bind = cmdbuf.store_pipeline_bind wc_3d.struct_1.store_pipeline_addr = cmdbuf.store_pipeline | 4 wc_3d.struct_1.unk_8 = 0x0 wc_3d.struct_1.unk_c = 0x0 - TAN_60 = 1.732051 wc_3d.struct_1.merge_upper_x = TAN_60 / width wc_3d.struct_1.merge_upper_y = TAN_60 / height @@ -515,7 +533,7 @@ class GPURenderer: wc_3d.struct_1.tile_blocks_x = mtile_x1 wc_3d.struct_1.unk_24 = 0x0 wc_3d.struct_1.tile_counts = ((tiles_y-1) << 12) | (tiles_x-1) - wc_3d.struct_1.unk_2c = 0x8 + wc_3d.struct_1.unk_2c = tib_blocks wc_3d.struct_1.depth_clear_val1 = cmdbuf.depth_clear_value wc_3d.struct_1.stencil_clear_val1 = cmdbuf.stencil_clear_value wc_3d.struct_1.unk_35 = 0x7 # clear flags? 2 = depth 4 = stencil? @@ -524,59 +542,13 @@ class GPURenderer: wc_3d.struct_1.unk_3c = 0x1 wc_3d.struct_1.unk_40 = 0 wc_3d.struct_1.unk_44_padding = bytes(0xac) - wc_3d.struct_1.depth_bias_array = Start3DArrayAddr(cmdbuf.depth_bias_array) - wc_3d.struct_1.scissor_array = Start3DArrayAddr(cmdbuf.scissor_array) - wc_3d.struct_1.visibility_result_buffer = 0x0 - wc_3d.struct_1.unk_118 = 0x0 - wc_3d.struct_1.unk_120 = [0] * 37 - wc_3d.struct_1.unk_reload_pipeline = Start3DClearPipelineBinding( - cmdbuf.partial_reload_pipeline_bind, cmdbuf.partial_reload_pipeline | 4) - wc_3d.struct_1.unk_258 = 0 - wc_3d.struct_1.unk_260 = 0 - wc_3d.struct_1.unk_268 = 0 - wc_3d.struct_1.unk_270 = 0 - wc_3d.struct_1.reload_pipeline = Start3DClearPipelineBinding( - cmdbuf.partial_reload_pipeline_bind, cmdbuf.partial_reload_pipeline | 4) - wc_3d.struct_1.depth_flags = cmdbuf.ds_flags | 0x44 - wc_3d.struct_1.unk_290 = 0x0 - wc_3d.struct_1.depth_buffer_ptr1 = cmdbuf.depth_buffer - wc_3d.struct_1.unk_2a0 = 0x0 - wc_3d.struct_1.unk_2a8 = 0x0 - wc_3d.struct_1.depth_buffer_ptr2 = cmdbuf.depth_buffer - wc_3d.struct_1.depth_buffer_ptr3 = cmdbuf.depth_buffer - wc_3d.struct_1.depth_aux_buffer_ptr = depth_aux_buffer_addr - wc_3d.struct_1.stencil_buffer_ptr1 = cmdbuf.stencil_buffer - wc_3d.struct_1.unk_2d0 = 0x0 - wc_3d.struct_1.unk_2d8 = 0x0 - wc_3d.struct_1.stencil_buffer_ptr2 = cmdbuf.stencil_buffer - wc_3d.struct_1.stencil_buffer_ptr3 = cmdbuf.stencil_buffer - wc_3d.struct_1.stencil_aux_buffer_ptr = stencil_aux_buffer_addr - wc_3d.struct_1.unk_2f8 = [0x0, 0x0] - wc_3d.struct_1.aux_fb_unk0 = 4 #0x8 # sometimes 4 - wc_3d.struct_1.unk_30c = 0x0 - wc_3d.struct_1.aux_fb = AuxFBInfo(0xc000, 0, width, height) - wc_3d.struct_1.unk_320_padding = bytes(0x10) - wc_3d.struct_1.unk_partial_store_pipeline = Start3DStorePipelineBinding( - cmdbuf.partial_store_pipeline_bind, cmdbuf.partial_store_pipeline | 4) - wc_3d.struct_1.partial_store_pipeline = Start3DStorePipelineBinding( - cmdbuf.partial_store_pipeline_bind, cmdbuf.partial_store_pipeline | 4) - wc_3d.struct_1.depth_clear_val2 = cmdbuf.depth_clear_value - wc_3d.struct_1.stencil_clear_val2 = cmdbuf.stencil_clear_value - wc_3d.struct_1.unk_375 = 3 - wc_3d.struct_1.unk_376 = 0x0 - wc_3d.struct_1.unk_378 = 0x10 - wc_3d.struct_1.unk_37c = 0x0 - wc_3d.struct_1.unk_380 = 0x0 - wc_3d.struct_1.unk_388 = 0x0 - wc_3d.struct_1.unk_390_0 = 0x0 # Ventura - wc_3d.struct_1.depth_dimensions = (width - 1) | ((height - 1) << 15) - if True: + if not use_registers: wc_3d.struct_2 = Start3DStruct2() - wc_3d.struct_2.unk_0 = 0xa000 + wc_3d.struct_2.unk_0 = utile_config wc_3d.struct_2.clear_pipeline = Start3DClearPipelineBinding( cmdbuf.load_pipeline_bind, cmdbuf.load_pipeline | 4) - wc_3d.struct_2.unk_18 = 0x88 + wc_3d.struct_2.unk_18 = ppp_multisamplectl wc_3d.struct_2.scissor_array = cmdbuf.scissor_array wc_3d.struct_2.depth_bias_array = cmdbuf.depth_bias_array wc_3d.struct_2.aux_fb = wc_3d.struct_1.aux_fb @@ -607,7 +579,7 @@ class GPURenderer: wc_3d.struct_2.tvb_heapmeta_addr2 = tvb_heapmeta._addr # 0x10000 - clear empty tiles # ISP_CTL (but bits seem to have moved) - wc_3d.struct_2.unk_f8 = 0x10280 #0x10280 # TODO: varies 0, 0x280, 0x10000, 0x10280 + wc_3d.struct_2.unk_f8 = tile_config wc_3d.struct_2.aux_fb_ptr = aux_fb._addr wc_3d.struct_2.unk_108 = [0x0, 0x0, 0x0, 0x0, 0x0, 0x0] wc_3d.struct_2.pipeline_base = self.ctx.pipeline_base @@ -619,21 +591,170 @@ class GPURenderer: wc_3d.struct_2.unk_168_padding = bytes(0x1d8) wc_3d.struct_2.unk_198_padding = bytes(0x1a8) + def fui(v): + return struct.unpack("> 8 start_3d.unk_68 = 0x0 start_3d.unk_buf_ptr = wc_3d.unk_758._addr start_3d.unk_buf2_ptr = wc_3d.unk_buf2._addr + start_3d.unk_7c_0 = 0x0 start_3d.unk_7c = 0x0 start_3d.unk_80 = 0x0 - start_3d.unk_84 = 0x0 + start_3d.unk_84 = int(unk1) start_3d.uuid = uuid_3d start_3d.attachments = [] - start_3d.unk_194 = 0 + start_3d.counter = wc_3d.counter start_3d.unkptr_19c = self.event_control.unk_buf._addr work.fb = None @@ -715,7 +843,10 @@ class GPURenderer: ts1.unk_30_padding = 0x0 ms.append(ts1) - ms.append(WaitForInterruptCmd(0, 1, 0)) + if Ver.check("G >= G14X"): + ms.append(Wait2Cmd()) + else: + ms.append(WaitForInterruptCmd(0, 1, 0)) ts2 = TimestampCmd() ts2.unk_1 = 0x0 @@ -748,6 +879,7 @@ class GPURenderer: finish_3d.workitem_ptr = wc_3d._addr finish_3d.unk_5c = self.ctx_id finish_3d.unk_buf_ptr = wc_3d.unk_758._addr + finish_3d.unk_6c_0 = 0 finish_3d.unk_6c = 0 finish_3d.unk_74 = 0 finish_3d.unk_7c = 0 @@ -772,7 +904,7 @@ class GPURenderer: #print(ctx_info) if wait_for is not None: - barrier_cmd = agx.kobj.new(WorkCommandBarrier, track=False) + barrier_cmd = agx.kobj.new(WorkCommandBarrier, track=False, align=0x20) work.add(barrier_cmd) if not isinstance(wait_for, tuple): barrier_cmd.stamp = wait_for.renderer.stamp_3d2 @@ -789,7 +921,7 @@ class GPURenderer: self.wq_ta.submit(barrier_cmd) if not self.buffer_mgr_initialized: - wc_initbm = agx.kobj.new(WorkCommandInitBM, track=False) + wc_initbm = agx.kobj.new(WorkCommandInitBM, track=False, align=0x20) work.add(wc_initbm) wc_initbm.context_id = self.ctx_id wc_initbm.buffer_mgr_slot = self.buffer_mgr_slot @@ -804,7 +936,7 @@ class GPURenderer: ##### TA execution - work.wc_ta = wc_ta = agx.kobj.new(WorkCommandTA, track=False) + work.wc_ta = wc_ta = agx.cmdbuf.new(WorkCommandTA, track=False, align=0x20) work.add(work.wc_ta) wc_ta.context_id = self.ctx_id wc_ta.counter = 1 @@ -816,7 +948,6 @@ class GPURenderer: wc_ta.unk_emptybuf_addr = wc_3d.unk_emptybuf_addr wc_ta.unk_34 = 0x0 - wc_ta.unk_154 = bytes(0x268) wc_ta.unk_3e8 = bytes(0x74) wc_ta.unk_594 = WorkCommand0_UnkBuf() @@ -834,12 +965,14 @@ class GPURenderer: wc_ta.unk_ts = TimeStamp() # Structures embedded in WorkCommandTA - if True: + if not use_registers: wc_ta.tiling_params = tiling_params - if True: + import random + + if not use_registers: wc_ta.struct_2 = StartTACmdStruct2() - wc_ta.struct_2.unk_0 = 0x200 + wc_ta.struct_2.unk_0 = 0 if unk1 else 0x200 wc_ta.struct_2.unk_8 = 0x1e3ce508 # fixed wc_ta.struct_2.unk_c = 0x1e3ce508 # fixed wc_ta.struct_2.tvb_tilemap = tvb_tilemap._addr @@ -850,7 +983,7 @@ class GPURenderer: wc_ta.struct_2.iogpu_unk_55 = 0x3a0012 # fixed wc_ta.struct_2.iogpu_unk_56 = 0x1 # fixed wc_ta.struct_2.tvb_cluster_meta1 = unk_tile_buf2._addr | 0x4_0000_0000_0000 - wc_ta.struct_2.unk_48 = 0xa000 + wc_ta.struct_2.unk_48 = utile_config wc_ta.struct_2.unk_50 = 0x88 # fixed wc_ta.struct_2.tvb_heapmeta_addr2 = tvb_heapmeta._addr wc_ta.struct_2.unk_60 = 0x0 # fixed @@ -872,6 +1005,92 @@ class GPURenderer: wc_ta.struct_2.unk_100 = [0x0, 0x0, 0x0] # fixed wc_ta.struct_2.unk_118 = 0x1c # fixed + wc_ta.registers_addr = 0 + wc_ta.register_count = 0 + wc_ta.registers_length = 0 + else: + regs = { + 0x10141: (0 if unk1 else 0x200), # s2.unk_0 + 0x1c039: tvb_tilemap._addr, + 0x1c9c8: tvb_tilemap._addr, + 0x1c041: unk_tile_buf1._addr, # s2.tvb_cluster_tilemaps + 0x1c9d0: unk_tile_buf1._addr, + 0x1c0a1: self.tpc._addr, # TE_TPC_ADDR + 0x1c031: tvb_heapmeta._addr | 0x8000_0000_0000_0000, + 0x1c9c0: tvb_heapmeta._addr | 0x8000_0000_0000_0000, + 0x1c051: 0x3a0012006b0003, # iogpu_unk_54/55 + 0x1c061: 1, # iogpu_unk_56 + 0x10149: utile_config, # s2.unk_48 utile_config + 0x10139: ppp_multisamplectl, # PPP_MULTISAMPLECTL + 0x10111: deflake_1._addr, + 0x1c9b0: deflake_1._addr, + 0x10119: deflake_2._addr, + 0x1c9b8: deflake_2._addr, + 0x1c958: 1, # s2.unk_80 + 0x1c950: deflake_3._addr | 0x4_0000_0000_0000, + 0x1c930: 0, # VCE related addr, lsb to enable + 0x1c880: cmdbuf.encoder_ptr, # VDM_CTRL_STREAM_BASE + 0x1c898: 0x0, # if lsb set, faults in UL1C0, possibly missing addr. + 0x1c948: unk_tile_buf3._addr, # tvb_cluster_meta2 + 0x1c888: unk_tile_buf4._addr, # tvb_cluster_meta3 + 0x1c890: 0x180341, # tvb_tiling_control + 0x1c918: 0x4, + 0x1c079: tvb_heapmeta._addr, + 0x1c9d8: tvb_heapmeta._addr, + 0x1c089: 0, + 0x1c9e0: 0, + 0x16c41: unk_tile_buf5._addr, # tvb_cluster_meta4 + 0x1ca40: unk_tile_buf5._addr, # tvb_cluster_meta4 + 0x1c9a8: 0x1c, # + meta1_blocks? # min_free_tvb_pages? + 0x1c920: unk_tile_buf2._addr, # ??? | meta1_blocks? + 0x10151: 0, + 0x1c199: 0, + 0x1c1a1: 0, + 0x1c1a9: 0, # 0x10151 bit 1 enables + 0x1c1b1: 0, + 0x1c1b9: 0, + 0x10061: self.ctx.pipeline_base, # USC_EXEC_BASE_TA + 0x11801: 0, # some shader? + 0x11809: 0, # maybe arg? + 0x11f71: 0, + 0x1c0b1: tiling_params.size1, # TE_PSG + 0x1c850: tiling_params.size1, + 0x10131: tiling_params.unk_4, + 0x10121: tiling_params.unk_8, # PPP_CTRL + 0x10129: tiling_params.x_max | (tiling_params.y_max << 16), # PPP_SCREEN + 0x101b9: tiling_params.tile_count, # TE_SCREEN + 0x1c069: tiling_params.x_blocks, # TE_MTILE1 + 0x1c071: tiling_params.y_blocks, # TE_MTILE2 + 0x1c081: tiling_params.size2, # TE_MTILE + 0x1c0a9: tiling_params.size3, # TE_TPC + 0x10171: tiling_params.unk_24, + 0x10169: tiling_params.unk_28, # TA_RENDER_TARGET_MAX + 0x12099: 0, + 0x1c9e8: 0, + } + + if False: + regs[0x10209] = 0x133 + regs[0x1c9f0] = 0x133 + regs[0x1c830] = 0x1 + regs[0x1c9f0] = 0x1502960fa0 + regs[0x16c39] = 0x1502960fa0 + regs[0x1c910] = 0xa0000b0125 + regs[0x1c8e0] = 0xff # core_mask_0 + regs[0x1c8e8] = 0x00 # core_mask_1 + + wc_ta.registers = [RegisterDefinition(k, v) for k, v in regs.items()] + ta_reg_count = len(wc_ta.registers) + wc_ta.registers += [RegisterDefinition(0, 0) for i in range(len(regs), 128)] + + wc_ta.set_addr() # Update inner structure addresses + + wc_ta.registers_addr = wc_ta.registers[0]._addr + wc_ta.register_count = ta_reg_count + wc_ta.registers_length = ta_reg_count * 12 + + wc_ta.unk_pad = 0 + if True: wc_ta.struct_3 = StartTACmdStruct3() wc_ta.struct_3.unk_480 = [0x0, 0x0, 0x0, 0x0, 0x0, 0x0] # fixed @@ -897,17 +1116,17 @@ class GPURenderer: wc_ta.struct_3.unk_548 = 0x0 # fixed wc_ta.struct_3.unk_550 = [ 0x0, 0x0, # fixed - 0x0, # 1 for boot stuff? + 0x0, # memoryless_rts_used 0x0, 0x0, 0x0] # fixed wc_ta.struct_3.stamp1 = self.stamp_ta1 wc_ta.struct_3.stamp2 = self.stamp_ta2 wc_ta.struct_3.stamp_value = self.stamp_value_ta wc_ta.struct_3.ev_ta = ev_ta.id wc_ta.struct_3.evctl_index = self.ev_idx - wc_ta.struct_3.unk_584 = 0x0 # 1 for boot stuff? + wc_ta.struct_3.unk_584 = 0x0 # flush_stamps wc_ta.struct_3.uuid2 = uuid_ta wc_ta.struct_3.queue_cmd_count = 0 - wc_ta.struct_3.unk_590 = 0 # sometimes 1? + wc_ta.struct_3.unk_590 = int(unk1) wc_ta.set_addr() # Update inner structure addresses #print("wc_ta", wc_ta) @@ -917,8 +1136,14 @@ class GPURenderer: self.mshook_ta(self, work, ms) start_ta = StartTACmd() - start_ta.tiling_params = wc_ta.tiling_params - start_ta.struct2 = wc_ta.struct_2 # len 0x120 + if not use_registers: + start_ta.tiling_params_addr = wc_ta.tiling_params._addr + start_ta.struct2_addr = wc_ta.struct_2._addr # len 0x120 + start_ta.registers_addr = 0 + else: + start_ta.tiling_params_addr = 0 + start_ta.struct2_addr = 0 + start_ta.registers_addr = wc_ta.registers[0]._addr start_ta.buffer_mgr = self.buffer_mgr.info start_ta.buf_thing = buf_desc start_ta.stats_ptr = agx.initdata.regionB.stats_ta.stats._addr @@ -929,11 +1154,11 @@ class GPURenderer: start_ta.buffer_mgr_slot = self.buffer_mgr_slot start_ta.unk_48 = 0#1 #0 start_ta.unk_50 = 0 - start_ta.struct3 = wc_ta.struct_3 + start_ta.struct3_addr = wc_ta.struct_3._addr start_ta.unkptr_5c = wc_ta.unk_594._addr start_ta.unk_64 = 0x0 # fixed - start_ta.unk_68 = 0x0 # sometimes 1? + start_ta.unk_68 = int(unk1) # sometimes 1? start_ta.uuid = uuid_ta start_ta.unk_70 = 0x0 # fixed start_ta.unk_74 = [ # fixed @@ -946,9 +1171,8 @@ class GPURenderer: start_ta.unk_16c = 0x0 # fixed start_ta.unk_170 = 0x0 # fixed start_ta.unk_178 = 0x0 # fixed? - start_ta.unk_17c = 0x0 + start_ta.counter = wc_ta.counter start_ta.unkptr_180 = self.event_control.unk_buf._addr - start_ta.unk_188 = 0x0 start_ta_offset = ms.append(start_ta) @@ -967,7 +1191,10 @@ class GPURenderer: ts1.unk_30_padding = 0x0 ms.append(ts1) - ms.append(WaitForInterruptCmd(1, 0, 0)) + if Ver.check("G >= G14X"): + ms.append(Wait2Cmd()) + else: + ms.append(WaitForInterruptCmd(0, 1, 0)) ts2 = TimestampCmd() ts2.unk_1 = 0x0 @@ -991,7 +1218,7 @@ class GPURenderer: finish_ta.cmdqueue_ptr = self.wq_ta.info._addr finish_ta.context_id = self.ctx_id finish_ta.unk_28 = 0x0 # fixed - finish_ta.struct3 = wc_ta.struct_3 + finish_ta.struct3_addr = wc_ta.struct_3._addr finish_ta.unk_34 = 0x0 # fixed finish_ta.uuid = uuid_ta finish_ta.stamp = self.stamp_ta2 @@ -1011,6 +1238,12 @@ class GPURenderer: ms.finalize() + print(wc_ta) + print(hex(wc_ta.struct_3._addr)) + print(hex(finish_ta.struct3_addr)) + print(hex(wc_ta._addr)) + ms.dump() + work.add(ms.obj) wc_ta.unkptr_45c = self.tpc._addr diff --git a/proxyclient/m1n1/fw/agx/channels.py b/proxyclient/m1n1/fw/agx/channels.py index 63677792..292437ed 100644 --- a/proxyclient/m1n1/fw/agx/channels.py +++ b/proxyclient/m1n1/fw/agx/channels.py @@ -52,7 +52,7 @@ class DC_DestroyContext(ConstructClass): "unk_18" / Hex(Int32ul), "context_addr" / Hex(Int64ul), "rest" / HexDump(Default(Bytes(0xc), bytes(0xc))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_Write32(ConstructClass): @@ -65,7 +65,7 @@ class DC_Write32(ConstructClass): "unk_18" / Int32ul, "unk_1c" / Int32ul, "rest" / HexDump(Default(Bytes(0x10), bytes(0x10))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_Write32B(ConstructClass): @@ -78,14 +78,15 @@ class DC_Write32B(ConstructClass): "unk_18" / Int32ul, "unk_1c" / Int32ul, "rest" / HexDump(Default(Bytes(0x10), bytes(0x10))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_Init(ConstructClass): subcon = Struct ( - "msg_type" / Const(0x19, Int32ul), + Ver("V < V13_3", "msg_type" / Const(0x19, Int32ul)), + Ver("V >= V13_3", "msg_type" / Const(0x1a, Int32ul)), "data" / HexDump(Default(Bytes(0x2c), bytes(0x2c))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_09(ConstructClass): @@ -95,14 +96,14 @@ class DC_09(ConstructClass): "unkptr_c" / Int64ul, "unk_14" / Int64ul, "data" / HexDump(Default(Bytes(0x14), bytes(0x14))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_Any(ConstructClass): subcon = Struct ( "msg_type" / Int32ul, "data" / HexDump(Default(Bytes(0x2c), bytes(0x2c))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_1e(ConstructClass): @@ -111,24 +112,24 @@ class DC_1e(ConstructClass): "unk_4" / Int64ul, "unk_c" / Int64ul, "data" / HexDump(Default(Bytes(0x1c), bytes(0x1c))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class DC_UpdateIdleTS(ConstructClass): subcon = Struct ( "msg_type" / Const(0x23, Int32ul), "data" / HexDump(Default(Bytes(0x2c), bytes(0x2c))), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) class UnknownMsg(ConstructClass): subcon = Struct ( "msg_type" / Hex(Int32ul), "data" / HexDump(Bytes(0x2c)), - Ver("G >= G14 && V >= V13_2", ZPadding(0x10)), + Ver("G == G14 && V >= V13_2", ZPadding(0x10)), ) -if Ver.check("G >= G14 && V >= V13_2"): +if Ver.check("G == G14 && V >= V13_2"): DeviceControlSize = 0x40 else: DeviceControlSize = 0x30 diff --git a/proxyclient/m1n1/fw/agx/cmdqueue.py b/proxyclient/m1n1/fw/agx/cmdqueue.py index ba13bbf1..5d9f4985 100644 --- a/proxyclient/m1n1/fw/agx/cmdqueue.py +++ b/proxyclient/m1n1/fw/agx/cmdqueue.py @@ -24,6 +24,7 @@ class WorkCommandBarrier(ConstructClass): "stamp_self" / Int32ul, "uuid" / Int32ul, "unk" / Default(Int32ul, 0), + Ver("G >= G14X", "pad" / ZPadding(0x20)), ) class WorkCommandInitBM(ConstructClass): @@ -244,9 +245,10 @@ class WorkCommand3D(ConstructClass): "tile_count" / Hex(Int64ul), # Embedded structures that are also pointed to by other stuff Ver("G < G14X", "struct_2" / Start3DStruct2), + Ver("G < G14X", "struct_1" / Start3DStruct1), Ver("G >= G14X", "registers" / Array(128, RegisterDefinition)), - Ver("G >= G14X", "unkpad_g14x" / Default(HexDump(Bytes(0x20)), bytes(0x20))), - "struct_1" / Start3DStruct1, + Ver("G >= G14X", "unk_g14x" / Default(Array(64, Int32ul), [0]*64)), + "struct_3" / Start3DStruct3, "unk_758" / Flag, "unk_75c" / Flag, "unk_buf" / WorkCommand1_UnkBuf, @@ -266,7 +268,7 @@ class WorkCommand3D(ConstructClass): Ver("V >= V13_0B4", "unk_928_4" / Int8ul), Ver("V >= V13_0B4", "unk_ts" / TimeStamp), Ver("V >= V13_0B4", "unk_928_d" / Default(HexDump(Bytes(0x1b)), bytes(0x1b))), - "pad_928" / Default(HexDump(Bytes(0x18)), bytes(0x18)), + Ver("V >= V13_3", "unk_pad2" / Default(HexDump(Bytes(0x3c)), bytes(0x3c))), ) class WorkCommand0_UnkBuf(ConstructValueClass): @@ -317,9 +319,9 @@ class WorkCommandTA(ConstructClass): # Embedded structures that are also pointed to by other stuff Ver("G >= G14X", "registers" / Array(128, RegisterDefinition)), - Ver("G >= G14X", "unk_154" / HexDump(Bytes(0x100))), # unknown + Ver("G >= G14X", "unk_154" / Default(HexDump(Bytes(0x100)), bytes(0x100))), # unknown Ver("G < G14X", "struct_2" / StartTACmdStruct2), # 0x11c bytes - Ver("G < G14X", "unk_154" / HexDump(Bytes(0x268))), # unknown + Ver("G < G14X", "unk_154" / Default(HexDump(Bytes(0x268)), bytes(0x268))), # unknown Ver("G < G14X", "tiling_params" / TilingParameters), # unknown Ver("G < G14X", "unk_3e8" / HexDump(Bytes(0x64))), # unknown "registers_addr" / Int64ul, @@ -353,7 +355,7 @@ class WorkCommandTA(ConstructClass): Ver("V >= V13_0B4", "unk_ts" / TimeStamp), Ver("V >= V13_0B4", "unk_5d8_d" / Default(HexDump(Bytes(0x13)), bytes(0x13))), "pad_5d8" / Default(HexDump(Bytes(0x8)), bytes(0x8)), - Ver("V >= V13_0B4", "pad_5e0" / Default(HexDump(Bytes(0x18)), bytes(0x18))), + Ver("V >= V13_3", "unk_pad2" / Default(HexDump(Bytes(0xc)), bytes(0xc))), ) class WorkCommandBlit(ConstructClass): diff --git a/proxyclient/m1n1/fw/agx/initdata.py b/proxyclient/m1n1/fw/agx/initdata.py index ed717bd7..f1759a00 100644 --- a/proxyclient/m1n1/fw/agx/initdata.py +++ b/proxyclient/m1n1/fw/agx/initdata.py @@ -1447,54 +1447,66 @@ class InitData_GPUQueueStatsTA(ConstructClass): "unk_14" / Int32ul, ) def __init__(self): + self.unk_0 = bytes(0x18) self.busy = 0 self.unk_4 = 0 self.cur_cmdqueue = 0 self.cur_count = 0 self.unk_14 = 0 + self.unk_18 = bytes(0x50) class InitData_GPUStatsTA(ConstructClass): subcon = Struct( "unk_4" / Int32ul, - "queues" / Array(4, InitData_GPUQueueStatsTA), + Ver("V < V13_0B4", "queues" / Array(4, InitData_GPUQueueStatsTA)), + Ver("V >= V13_0B4", "queues" / Array(8, InitData_GPUQueueStatsTA)), "unk_68" / Bytes(0x8), "unk_70" / Int32ul, "unk_74" / Int32ul, - "unk_timestamp" / Int64ul, + Ver("V >= V13_0B4", "unk_c0" / HexDump(Bytes(0x558))), + "unk_timestamp" / Array(16, Int64ul), "unk_80" / HexDump(Bytes(0x40)), - Ver("V >= V13_0B4", "unk_c0" / HexDump(Bytes(0x5c4))), + Ver("V >= V13_3", "unk_684" / HexDump(Bytes(0x800))), ) def __init__(self): self.unk_4 = 0 - self.queues = [InitData_GPUQueueStatsTA() for i in range(4)] + if Ver.check("V >= V13_0B4"): + self.queues = [InitData_GPUQueueStatsTA() for i in range(8)] + else: + self.queues = [InitData_GPUQueueStatsTA() for i in range(4)] self.unk_68 = bytes(0x8) self.unk_70 = 0 self.unk_74 = 0 - self.unk_timestamp = 0 + self.unk_timestamp = [0]*16 self.unk_80 = bytes(0x40) - self.unk_c0 = bytes(0x5c4) + self.unk_c0 = bytes(0x558) + self.unk_684 = bytes(0x800) class InitData_GPUQueueStats3D(ConstructClass): subcon = Struct( "busy" / Int32ul, + Ver("V >= V13_0B4", ZPadding(4)), "cur_cmdqueue" / Int64ul, "unk_c" / Int32ul, "unk_10" / Int32ul, - "unk_14" / HexDump(Bytes(0x28 - 0x14)), + "unk_14" / HexDump(Bytes(0x10)), + Ver("V < V13_0B4", ZPadding(4)), ) def __init__(self): self.busy = 0 self.cur_cmdqueue = 0 self.unk_c = 0 self.unk_10 = 0 - self.unk_14 = bytes(0x14) + self.unk_14 = bytes(0x10) class InitData_GPUStats3D(ConstructClass): subcon = Struct( "unk_0" / Bytes(0x18), - "queues" / Array(4, InitData_GPUQueueStats3D), - Ver("G >= G14X", "unk_d0_0" / Default(HexDump(Bytes(0x910)), bytes(0x910))), + Ver("G >= G14X", "unk_d0_0" / Default(HexDump(Bytes(0x50)), bytes(0x50))), + Ver("V < V13_0B4", "queues" / Array(4, InitData_GPUQueueStats3D)), + Ver("V >= V13_0B4", "queues" / Array(8, InitData_GPUQueueStats3D)), + Ver("G >= G14X", "unk_d0_0" / Default(HexDump(Bytes(0x820)), bytes(0x820))), "unk_d0" / HexDump(Bytes(0x38)), "tvb_overflows_1" / Int32ul, "tvb_overflows_2" / Int32ul, @@ -1515,7 +1527,10 @@ class InitData_GPUStats3D(ConstructClass): def __init__(self): self.unk_0 = bytes(0x18) - self.queues = [InitData_GPUQueueStats3D() for i in range(4)] + if Ver.check("V >= V13_0B4"): + self.queues = [InitData_GPUQueueStats3D() for i in range(8)] + else: + self.queues = [InitData_GPUQueueStats3D() for i in range(4)] self.unk_68 = 0 self.cur_cmdqueue = 0 self.unk_d0 = bytes(0x38) @@ -1622,7 +1637,7 @@ class InitData_RegionB(ConstructClass): "unk_ctr5" / Int32ul, "unk_6afc" / Int32ul, "pad_6b00" / HexDump(Bytes(0x38)), - Ver("G >= G14X", ZPadding(0x4800)), + Ver("G >= G14X", "pad_6b00_extra" / HexDump(Bytes(0x4800))), "unk_6b38" / Int32ul, "pad_6b3c" / HexDump(Bytes(0x84)), ) @@ -1635,6 +1650,7 @@ class InitData_RegionB(ConstructClass): self.unk_224 = bytes(0x685c) self.unkpad_6a88 = bytes(0x14) self.pad_6b00 = bytes(0x38) + self.pad_6b00_extra = bytes(0x4800) self.unk_6b38 = 0xff self.pad_6b3c = bytes(0x84) @@ -1816,12 +1832,13 @@ class InitData_RegionC(ConstructClass): Ver("V >= V13_0B4", "unk_118e4_0" / Dec(Int32ul)), "unk_118e4" / Int32ul, "unk_118e8" / Int32ul, - "unk_118ec" / Array(0x800, Int8ul), - "unk_11901" / HexDump(Bytes(0x7e)), + "unk_118ec" / Array(0x400, Int8ul), + "unk_11901" / HexDump(Bytes(0x54)), Ver("V >= V13_0B4", "unk_11d40" / HexDump(Bytes(0x19c))), Ver("V >= V13_0B4", "unk_11edc" / Int32ul), Ver("V >= V13_0B4", "unk_11ee0" / HexDump(Bytes(0x1c))), Ver("V >= V13_0B4", "unk_11efc" / Int32ul), + Ver("V >= V13_3", "unk_11f00" / HexDump(Bytes(0x280))), ) def __init__(self, sgx, chip_info): @@ -1956,12 +1973,13 @@ class InitData_RegionC(ConstructClass): self.unk_118e4 = 0 self.unk_118e8 = 0 if chip_info.unk_118ec is None else 1 self.unk_118ec = chip_info.unk_118ec or [] - self.unk_118ec += [0] * (2048 - len(self.unk_118ec)) - self.unk_11901 = bytes(126) + self.unk_118ec += [0] * (1024 - len(self.unk_118ec)) + self.unk_11901 = bytes(0x54) self.unk_11d40 = bytes(0x19c) self.unk_11edc = 0 self.unk_11ee0 = bytes(0x1c) self.unk_11efc = 0 + self.unk_11f00 = bytes(0x280) class UatLevelInfo(ConstructClass): subcon = Struct( diff --git a/proxyclient/m1n1/fw/agx/microsequence.py b/proxyclient/m1n1/fw/agx/microsequence.py index 2e0cddab..700d23a2 100644 --- a/proxyclient/m1n1/fw/agx/microsequence.py +++ b/proxyclient/m1n1/fw/agx/microsequence.py @@ -229,6 +229,55 @@ class Start3DStruct1(ConstructClass): "unk_3c" / Int32ul, "unk_40" / Int32ul, "unk_44_padding" / HexDump(Bytes(0x9c)), + ) + +class Start3DStruct2(ConstructClass): + subcon = Struct( + "unk_0" / Int64ul, + "clear_pipeline" / Start3DClearPipelineBinding, + "unk_18" / Int64ul, + "scissor_array" / Int64ul, + "depth_bias_array" / Int64ul, + "aux_fb" / AuxFBInfo, + "depth_dimensions" / Int64ul, + "visibility_result_buffer" / Int64ul, + "depth_flags" / Int64ul, # 0x40000 - has stencil 0x80000 - has depth + Ver("G >= G14", "unk_58_g14_0" / Int64ul), + Ver("G >= G14", "unk_58_g14_8" / Int64ul), + "depth_buffer_ptr1" / Int64ul, + "depth_buffer_ptr2" / Int64ul, + "stencil_buffer_ptr1" / Int64ul, + "stencil_buffer_ptr2" / Int64ul, + Ver("G >= G14", "unk_68_g14_0" / HexDump(Bytes(0x20))), + "unk_78" / Array(4, Int64ul), + "depth_aux_buffer_ptr1" / Int64ul, + "unk_a0" / Int64ul, + "depth_aux_buffer_ptr2" / Int64ul, + "unk_b0" / Int64ul, + "stencil_aux_buffer_ptr1" / Int64ul, + "unk_c0" / Int64ul, + "stencil_aux_buffer_ptr2" / Int64ul, + "unk_d0" / Int64ul, + "tvb_tilemap" / Int64ul, + "tvb_heapmeta_addr" / Int64ul, + "unk_e8" / Int64ul, + "tvb_heapmeta_addr2" / Int64ul, + "unk_f8" / Int64ul, + "aux_fb_ptr" / Int64ul, + "unk_108" / Array(6, Int64ul), + "pipeline_base" / Int64ul, + "unk_140" / Int64ul, + "unk_148" / Int64ul, + "unk_150" / Int64ul, + "unk_158" / Int64ul, + "unk_160" / Int64ul, + Ver("G < G14", "unk_168_padding" / HexDump(Bytes(0x1d8))), + Ver("G >= G14", "unk_198_padding" / HexDump(Bytes(0x1a8))), + Ver("V < V13_0B4", ZPadding(8)), + ) + +class Start3DStruct3(ConstructClass): + subcon = Struct( "registers_addr" / Int64ul, "register_count" / Int16ul, "registers_length" / Int16ul, @@ -278,55 +327,11 @@ class Start3DStruct1(ConstructClass): "depth_dimensions" / Int64ul, ) -class Start3DStruct2(ConstructClass): - subcon = Struct( - "unk_0" / Int64ul, - "clear_pipeline" / Start3DClearPipelineBinding, - "unk_18" / Int64ul, - "scissor_array" / Int64ul, - "depth_bias_array" / Int64ul, - "aux_fb" / AuxFBInfo, - "depth_dimensions" / Int64ul, - "visibility_result_buffer" / Int64ul, - "depth_flags" / Int64ul, # 0x40000 - has stencil 0x80000 - has depth - Ver("G >= G14", "unk_58_g14_0" / Int64ul), - Ver("G >= G14", "unk_58_g14_8" / Int64ul), - "depth_buffer_ptr1" / Int64ul, - "depth_buffer_ptr2" / Int64ul, - "stencil_buffer_ptr1" / Int64ul, - "stencil_buffer_ptr2" / Int64ul, - Ver("G >= G14", "unk_68_g14_0" / HexDump(Bytes(0x20))), - "unk_78" / Array(4, Int64ul), - "depth_aux_buffer_ptr1" / Int64ul, - "unk_a0" / Int64ul, - "depth_aux_buffer_ptr2" / Int64ul, - "unk_b0" / Int64ul, - "stencil_aux_buffer_ptr1" / Int64ul, - "unk_c0" / Int64ul, - "stencil_aux_buffer_ptr2" / Int64ul, - "unk_d0" / Int64ul, - "tvb_tilemap" / Int64ul, - "tvb_heapmeta_addr" / Int64ul, - "unk_e8" / Int64ul, - "tvb_heapmeta_addr2" / Int64ul, - "unk_f8" / Int64ul, - "aux_fb_ptr" / Int64ul, - "unk_108" / Array(6, Int64ul), - "pipeline_base" / Int64ul, - "unk_140" / Int64ul, - "unk_148" / Int64ul, - "unk_150" / Int64ul, - "unk_158" / Int64ul, - "unk_160" / Int64ul, - Ver("G < G14", "unk_168_padding" / HexDump(Bytes(0x1d8))), - Ver("G >= G14", "unk_198_padding" / HexDump(Bytes(0x1a8))), - Ver("V < V13_0B4", ZPadding(8)), - ) - class BufferThing(ConstructClass): subcon = Struct( - Ver("G >= G14X", "unkptr_0_0" / Int64ul), - Ver("G >= G14X", "unkptr_0_8" / Int64ul), + Ver("G >= G14X", "unk0_addr" / Int64ul), + Ver("G >= G14X", "unk0_addr2" / Int64ul), + # Ver("G >= G14X", "unk0" / ROPointer(this.unk0_addr, Array(8, Int32ul))), "unk_0" / Int64ul, "unk_8" / Int64ul, "unk_10" / Int64ul, @@ -424,7 +429,7 @@ class Start3DCmd(ConstructClass): "attachments" / Array(16, Attachment), "num_attachments" / Int32ul, "unk_190" / Int32ul, - Ver("V >= V13_0B4", "unk_194" / Int64ul), + Ver("V >= V13_0B4", "counter" / Int64ul), Ver("V >= V13_0B4", "unkptr_19c" / Int64ul), ) @@ -576,7 +581,6 @@ class StartTACmd(ConstructClass): "unk_48" / Int64ul, "unk_50" / Int32ul, "struct3_addr" / Int64ul, - "struct3" / ROPointer(this.struct3_addr, StartTACmdStruct3), "unkptr_5c" / Int64ul, "unk_5c" / ROPointer(this.unkptr_5c, HexDump(Bytes(0x18))), "unk_64" / Int32ul, @@ -589,10 +593,9 @@ class StartTACmd(ConstructClass): "unk_168" / Int32ul, "unk_16c" / Int32ul, "unk_170" / Int64ul, - "unk_178" / Int32ul, - Ver("V >= V13_0B4", "unk_17c" / Int32ul), + Ver("V >= V13_0B4", "counter" / Int64ul), Ver("V >= V13_0B4", "unkptr_180" / Int64ul), - Ver("V >= V13_0B4", "unk_188" / Int32ul), + "unk_178" / Int32ul, ) class FinalizeTACmd(ConstructClass): @@ -607,7 +610,6 @@ class FinalizeTACmd(ConstructClass): "context_id" / Int32ul, "unk_28" / Int32ul, "struct3_addr" / Int64ul, - "struct3" / ROPointer(this.struct3_addr, StartTACmdStruct3), "unk_34" / Int32ul, "uuid" / Int32ul, "stamp_addr" / Int64ul, @@ -861,18 +863,9 @@ class WaitForInterruptCmd(ConstructClass): class Wait2Cmd(ConstructClass): subcon = Struct( - "magic" / Const(0x02, Int8ul), - "unk_1" / Int8ul, - "unk_2" / Int8ul, - "unk_3" / Int8ul, + "magic" / Const(0x02, Int32ul), ) - def __init__(self, unk_1, unk_2, unk_3): - super().__init__() - self.unk_1 = unk_1 - self.unk_2 = unk_2 - self.unk_3 = unk_3 - class NopCmd(ConstructClass): # This doesn't exist subcon = Struct( diff --git a/proxyclient/m1n1/hw/agx.py b/proxyclient/m1n1/hw/agx.py index 5c4d69c5..5ba02241 100644 --- a/proxyclient/m1n1/hw/agx.py +++ b/proxyclient/m1n1/hw/agx.py @@ -2,7 +2,7 @@ from ..utils import * from enum import IntEnum -__all__ = ["SGXRegs", "SGXInfoRegs", "agx_decode_unit", "R_FAULT_INFO"] +__all__ = ["SGXRegs", "SGXRegsT602X", "SGXInfoRegs", "agx_decode_unit", "R_FAULT_INFO"] class FAULT_REASON(IntEnum): INVALID = 0 @@ -26,6 +26,10 @@ class R_FAULT_INFO(Register64): class SGXRegs(RegMap): FAULT_INFO = 0x17030, R_FAULT_INFO +class SGXRegsT602X(RegMap): + FAULT_INFO = 0xd8c0, R_FAULT_INFO + FAULT_ADDR = 0xd8c8, Register64 + class SGXInfoRegs(RegMap): CORE_MASK_0 = 0x1500, Register32, CORE_MASK_1 = 0x1514, Register32, @@ -84,7 +88,27 @@ class UNIT_A0(IntEnum): GL2CC_META7 = 0xb7 GL2CC_MB = 0xb8 -class UNIT_E0(IntEnum): +class UNIT_D0_T602X(IntEnum): + gCDM_CS = 0xd0 + gCDM_ID = 0xd1 + gCDM_CSR = 0xd2 + gCDM_CSW = 0xd3 + gCDM_CTXR = 0xd4 + gCDM_CTXW = 0xd5 + gIPP = 0xd6 + gIPP_CS = 0xd7 + gKSM_RCE = 0xd8 + +class UNIT_E0_T602X(IntEnum): + gPM_SPn = 0xe0 + gVDM_CSD_SPn = 0xe1 + gVDM_SSD_SPn = 0xe2 + gVDM_ILF_SPn = 0xe3 + gVDM_TFP_SPn = 0xe4 + gVDM_MMB_SPn = 0xe5 + gRDE_SPn = 0xe6 + +class UNIT_E0_T8103(IntEnum): gPM_SPn = 0xe0 gVDM_CSD_SPn = 0xe1 gVDM_SSD_SPn = 0xe2 @@ -106,8 +130,10 @@ def agx_decode_unit(v): if v < 0xa0: group = v >> 4 return UNIT_00(v & 0x0f).name.replace("n", str(group)) - elif v < 0xe0: + elif v < 0xd0: return UNIT_A0(v).name + elif v < 0xe0: + return UNIT_D0_T602X(v).name else: group = (v >> 4) & 1 - return UNIT_E0(v & 0xef).name.replace("n", str(group)) + return UNIT_E0_T8103(v & 0xef).name.replace("n", str(group))