2022-10-21 12:56:00 +00:00
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/* SPDX-License-Identifier: MIT */
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#include "kboot.h"
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#include "adt.h"
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#include "assert.h"
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#include "soc.h"
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#include "utils.h"
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#include "libfdt/libfdt.h"
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#define bail(...) \
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do { \
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printf(__VA_ARGS__); \
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return -1; \
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} while (0)
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2022-11-02 18:26:09 +00:00
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#define MAX_PSTATES 16
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#define MAX_CLUSTERS 8
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struct perf_state {
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u32 freq;
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u32 volt;
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};
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2022-10-21 12:56:00 +00:00
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u32 t8103_pwr_scale[] = {0, 63, 80, 108, 150, 198, 210};
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2022-11-02 18:26:09 +00:00
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int calc_power_t8103(int sgx, u32 count, u32 table_count, const struct perf_state *perf_states,
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u32 *max_pwr)
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{
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UNUSED(sgx);
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u32 pwr_scale_count = ARRAY_SIZE(t8103_pwr_scale);
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if (table_count != 1)
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bail("ADT: GPU: expected 1 perf state table but got %d\n", table_count);
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if (count != pwr_scale_count)
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bail("ADT: GPU: expected %d perf states but got %d\n", pwr_scale_count, count);
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for (u32 i = 0; i < pwr_scale_count; i++)
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max_pwr[i] = (u32)perf_states[i].volt * (u32)t8103_pwr_scale[i] * 100;
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return 0;
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}
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u32 t6000_pwr_scale[] = {0, 15, 19, 25, 34, 50, 100};
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int calc_power_t600x(int sgx, u32 count, u32 table_count, const struct perf_state *perf_states,
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u32 *max_pwr)
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{
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UNUSED(sgx);
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UNUSED(perf_states);
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u32 nclusters = 0;
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switch (chip_id) {
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case T6000:
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nclusters = 2;
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break;
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case T6001:
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nclusters = 4;
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break;
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case T6002:
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nclusters = 8;
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break;
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}
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u32 pwr_scale_count = ARRAY_SIZE(t6000_pwr_scale);
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if (table_count != nclusters)
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bail("ADT: GPU: expected %d perf state tables but got %d\n", nclusters, table_count);
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if (count != pwr_scale_count)
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bail("ADT: GPU: expected %d perf states but got %d\n", pwr_scale_count, count);
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for (u32 i = 0; i < pwr_scale_count; i++) {
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max_pwr[i] = t6000_pwr_scale[i] * 1667430 * nclusters / 8;
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}
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return 0;
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}
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2022-10-21 12:56:00 +00:00
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static int dt_set_region(void *dt, int sgx, const char *name, const char *path)
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{
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u64 base, size;
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char prop[64];
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snprintf(prop, sizeof(prop), "%s-base", name);
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if (ADT_GETPROP(adt, sgx, prop, &base) < 0 || !base)
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bail("ADT: GPU: failed to find %s property\n", prop);
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snprintf(prop, sizeof(prop), "%s-size", name);
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if (ADT_GETPROP(adt, sgx, prop, &size) < 0 || !base)
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bail("ADT: GPU: failed to find %s property\n", prop);
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int node = fdt_path_offset(dt, path);
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if (node < 0)
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bail("FDT: GPU: failed to find %s node\n", path);
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fdt64_t reg[2];
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fdt64_st(®[0], base);
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fdt64_st(®[1], size);
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if (fdt_setprop_inplace(dt, node, "reg", reg, sizeof(reg)))
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bail("FDT: GPU: failed to set reg prop for %s\n", path);
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return 0;
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}
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int dt_set_gpu(void *dt)
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{
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2022-11-02 18:26:09 +00:00
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int (*calc_power)(int sgx, u32 count, u32 table_count, const struct perf_state *perf,
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u32 *max_pwr);
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2022-10-21 12:56:00 +00:00
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switch (chip_id) {
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case T8103:
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2022-11-02 18:26:09 +00:00
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calc_power = calc_power_t8103;
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break;
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case T6000:
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case T6001:
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case T6002:
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calc_power = calc_power_t600x;
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2022-10-21 12:56:00 +00:00
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break;
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default:
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printf("ADT: GPU: unsupported chip!\n");
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return 0;
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}
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int gpu = fdt_path_offset(dt, "gpu");
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if (gpu < 0) {
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printf("FDT: GPU: gpu alias not found in device tree\n");
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return 0;
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}
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int len;
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const fdt32_t *opps_ph = fdt_getprop(dt, gpu, "operating-points-v2", &len);
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if (!opps_ph || len != 4)
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bail("FDT: GPU: operating-points-v2 not found\n");
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int opps = fdt_node_offset_by_phandle(dt, fdt32_ld(opps_ph));
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if (opps < 0)
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bail("FDT: GPU: node for phandle %u not found\n", fdt32_ld(opps_ph));
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int sgx = adt_path_offset(adt, "/arm-io/sgx");
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if (sgx < 0)
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bail("ADT: GPU: /arm-io/sgx node not found\n");
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u32 perf_state_count;
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if (ADT_GETPROP(adt, sgx, "perf-state-count", &perf_state_count) < 0 || !perf_state_count)
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bail("ADT: GPU: missing perf-state-count\n");
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2022-11-02 18:26:09 +00:00
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u32 perf_state_table_count;
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if (ADT_GETPROP(adt, sgx, "perf-state-table-count", &perf_state_table_count) < 0 ||
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!perf_state_table_count)
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bail("ADT: GPU: missing perf-state-table-count\n");
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if (perf_state_count > MAX_PSTATES)
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bail("ADT: GPU: perf-state-count too large\n");
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if (perf_state_table_count > MAX_CLUSTERS)
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bail("ADT: GPU: perf-state-table-count too large\n");
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2022-10-21 12:56:00 +00:00
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u32 perf_states_len;
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2022-11-02 18:26:09 +00:00
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const struct perf_state *perf_states;
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2022-10-21 12:56:00 +00:00
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perf_states = adt_getprop(adt, sgx, "perf-states", &perf_states_len);
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2022-11-02 18:26:09 +00:00
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if (!perf_states ||
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perf_states_len != sizeof(*perf_states) * perf_state_count * perf_state_table_count)
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2022-10-21 12:56:00 +00:00
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bail("ADT: GPU: invalid perf-states length\n");
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2022-11-02 18:26:09 +00:00
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u32 max_pwr[MAX_PSTATES];
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2022-10-21 12:56:00 +00:00
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2022-11-02 18:26:09 +00:00
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if (calc_power(sgx, perf_state_count, perf_state_table_count, perf_states, max_pwr))
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return -1;
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2022-10-21 12:56:00 +00:00
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u32 i = 0;
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int opp;
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fdt_for_each_subnode(opp, dt, opps)
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{
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2022-11-02 18:26:09 +00:00
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fdt32_t volts[MAX_CLUSTERS];
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for (u32 j = 0; j < perf_state_table_count; j++) {
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volts[j] = cpu_to_fdt32(perf_states[i + j * perf_state_count].volt * 1000);
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}
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2022-10-21 12:56:00 +00:00
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if (i >= perf_state_count)
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bail("FDT: GPU: Expected %d operating points, but found more\n", perf_state_count);
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2022-11-02 18:26:09 +00:00
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if (fdt_setprop_inplace(dt, opp, "opp-microvolt", &volts,
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sizeof(u32) * perf_state_table_count))
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2022-10-21 12:56:00 +00:00
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bail("FDT: GPU: Failed to set opp-microvolt for PS %d\n", i);
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if (fdt_setprop_inplace_u64(dt, opp, "opp-hz", perf_states[i].freq))
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bail("FDT: GPU: Failed to set opp-hz for PS %d\n", i);
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2022-11-02 18:26:09 +00:00
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if (fdt_setprop_inplace_u32(dt, opp, "opp-microwatt", max_pwr[i]))
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bail("FDT: GPU: Failed to set opp-microwatt for PS %d\n", i);
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2022-10-21 12:56:00 +00:00
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i++;
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}
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if (i != perf_state_count)
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bail("FDT: GPU: Expected %d operating points, but found %d\n", perf_state_count, i);
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if (dt_set_region(dt, sgx, "gfx-handoff", "/reserved-memory/uat-handoff"))
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return -1;
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if (dt_set_region(dt, sgx, "gfx-shared-region", "/reserved-memory/uat-pagetables"))
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return -1;
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if (dt_set_region(dt, sgx, "gpu-region", "/reserved-memory/uat-ttbs"))
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return -1;
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return 0;
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}
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