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Serial 2021-05-16 22:30:23 -04:00
parent b9ee301756
commit 9637923284
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src/components/logic/write.rs
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@ -135,6 +135,7 @@ where
let last_len = (packet.len() % 255) as u8;
let needed = (packet.len() / 255) + 1;
// TODO: multi page support
let mut segments = Vec::with_capacity(needed);
for i in 0..needed {