From a7eea205f5f7589cddaa2245c45d18a6c5923005 Mon Sep 17 00:00:00 2001 From: Omar Santos Date: Tue, 26 Jun 2018 21:58:40 -0400 Subject: [PATCH] Update registers.md --- buffer_overflow_example/registers.md | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/buffer_overflow_example/registers.md b/buffer_overflow_example/registers.md index 89e4bcd..7c17cbd 100644 --- a/buffer_overflow_example/registers.md +++ b/buffer_overflow_example/registers.md @@ -1,14 +1,8 @@ # Good Information about Registers -x64 extends x86's 8 general-purpose registers to be 64-bit, and adds 8 new 64-bit registers. +- Intel's Architecture Documentation: https://software.intel.com/en-us/articles/intel-sdm -The 64-bit registers have names beginning with "r", so for example the 64-bit extension of **eax** is called **rax**. - -The lower 32 bits, 16 bits, and 8 bits of each register are directly addressable in operands. - -This includes registers, like **esi**, whose lower 8 bits were not previously addressable. - -The following table specifies the assembly-language names for the lower portions of 64-bit registers. +Additional Notes: The x64 architecture extends x86's 8 general-purpose registers to be 64-bit, and adds 8 new 64-bit registers. The 64-bit registers have names beginning with "r", so for example the 64-bit extension of **eax** is called **rax**. The lower 32 bits, 16 bits, and 8 bits of each register are directly addressable in operands. This includes registers, like **esi**, whose lower 8 bits were not previously addressable. The following table specifies the assembly-language names for the lower portions of 64-bit registers.