This website requires JavaScript.
Explore
Help
Sign In
Mirrors
/
bat
Watch
2
Star
0
Fork
You've already forked bat
0
mirror of
https://github.com/sharkdp/bat
synced
2024-12-01 08:09:17 +00:00
Code
Issues
Projects
Releases
Packages
Wiki
Activity
d6d8b61131
bat
/
tests
/
syntax-tests
/
source
/
Verilog
History
Mohamed Abdelnour
c18afcb01a
Add Verilog syntax test file
2021-06-01 22:36:56 +02:00
..
div_pipelined.v
Add Verilog syntax test file
2021-06-01 22:36:56 +02:00
LICENSE.md
Add Verilog syntax test file
2021-06-01 22:36:56 +02:00