2018-05-14 06:52:41 +00:00
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/*
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2019-05-06 20:51:09 +00:00
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* This file is part of Checkpoint
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* Copyright (C) 2017-2019 Bernardo Giordano, FlagBrew
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Additional Terms 7.b and 7.c of GPLv3 apply to this file:
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* * Requiring preservation of specified reasonable legal notices or
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* author attributions in that material or in the Appropriate Legal
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* Notices displayed by works containing it.
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* * Prohibiting misrepresentation of the origin of that material,
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* or requiring that modified versions of such material be marked in
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* reasonable ways as different from the original version.
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*/
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2018-05-14 06:52:41 +00:00
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2017-10-04 11:18:41 +00:00
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/*
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* This file is part of TWLSaveTool.
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* Copyright (C) 2015-2016 TuxSH
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*
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* TWLSaveTool is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>
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*/
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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#include "spi.hpp"
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2017-10-04 11:18:41 +00:00
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u8* fill_buf = NULL;
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2017-12-18 19:43:35 +00:00
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Result SPIWriteRead(CardType type, void* cmd, u32 cmdSize, void* answer, u32 answerSize, void* data, u32 dataSize)
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{
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2018-05-14 06:52:41 +00:00
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u8 transferOp = pxiDevMakeTransferOption(BAUDRATE_4MHZ, BUSMODE_1BIT), transferOp2 = pxiDevMakeTransferOption(BAUDRATE_1MHZ, BUSMODE_1BIT);
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2019-05-06 20:51:09 +00:00
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u64 waitOp = pxiDevMakeWaitOperation(WAIT_NONE, DEASSERT_NONE, 0LL);
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2018-05-14 06:52:41 +00:00
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u64 headerFooterVal = 0;
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2019-05-06 20:51:09 +00:00
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bool b = type == FLASH_512KB_INFRARED || type == FLASH_256KB_INFRARED;
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PXIDEV_SPIBuffer headerBuffer = {&headerFooterVal, (b) ? 1U : 0U, (b) ? transferOp2 : transferOp, waitOp};
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PXIDEV_SPIBuffer cmdBuffer = {cmd, cmdSize, transferOp, waitOp};
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PXIDEV_SPIBuffer answerBuffer = {answer, answerSize, transferOp, waitOp};
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PXIDEV_SPIBuffer dataBuffer = {data, dataSize, transferOp, waitOp};
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PXIDEV_SPIBuffer nullBuffer = {NULL, 0U, transferOp, waitOp};
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PXIDEV_SPIBuffer footerBuffer = {&headerFooterVal, 0U, transferOp, waitOp};
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2018-05-14 06:52:41 +00:00
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return PXIDEV_SPIMultiWriteRead(&headerBuffer, &cmdBuffer, &answerBuffer, &dataBuffer, &nullBuffer, &footerBuffer);
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result SPIWaitWriteEnd(CardType type)
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{
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2018-05-14 06:52:41 +00:00
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u8 cmd = SPI_CMD_RDSR, statusReg = 0;
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Result res = 0;
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2019-05-06 20:51:09 +00:00
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int panic = 0;
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2018-05-14 06:52:41 +00:00
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do {
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panic++;
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res = SPIWriteRead(type, &cmd, 1, &statusReg, 1, 0, 0);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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2018-05-14 06:52:41 +00:00
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} while (statusReg & SPI_FLG_WIP && panic < 1000);
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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return panic >= 1000 ? 1 : 0;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result SPIEnableWriting(CardType type)
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{
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2018-05-14 06:52:41 +00:00
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u8 cmd = SPI_CMD_WREN, statusReg = 0;
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Result res = SPIWriteRead(type, &cmd, 1, NULL, 0, 0, 0);
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2017-10-04 11:18:41 +00:00
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2019-05-06 20:51:09 +00:00
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if (res || type == EEPROM_512B)
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return res; // Weird, but works (otherwise we're getting an infinite loop for that chip type).
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2018-05-14 06:52:41 +00:00
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cmd = SPI_CMD_RDSR;
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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do {
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res = SPIWriteRead(type, &cmd, 1, &statusReg, 1, 0, 0);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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} while (statusReg & ~SPI_FLG_WEL);
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2018-05-14 06:52:41 +00:00
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return 0;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result SPIReadJEDECIDAndStatusReg(CardType type, u32* id, u8* statusReg)
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{
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2019-05-06 20:51:09 +00:00
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u8 cmd = SPI_FLASH_CMD_RDID;
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u8 reg = 0;
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u8 idbuf[3] = {0};
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u32 id_ = 0;
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Result res = SPIWaitWriteEnd(type);
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if (res)
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return res;
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if ((res = SPIWriteRead(type, &cmd, 1, idbuf, 3, 0, 0)))
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return res;
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2018-05-14 06:52:41 +00:00
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id_ = (idbuf[0] << 16) | (idbuf[1] << 8) | idbuf[2];
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cmd = SPI_CMD_RDSR;
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2019-05-06 20:51:09 +00:00
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if ((res = SPIWriteRead(type, &cmd, 1, ®, 1, 0, 0)))
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return res;
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if (id)
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*id = id_;
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if (statusReg)
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*statusReg = reg;
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2018-05-14 06:52:41 +00:00
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return 0;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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u32 SPIGetPageSize(CardType type)
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{
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2019-05-06 20:51:09 +00:00
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u32 EEPROMSizes[] = {16, 32, 128, 256};
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if (type == NO_CHIP || type > CHIP_LAST)
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return 0;
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else if (type < FLASH_256KB_1)
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return EEPROMSizes[(int)type];
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else
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return 256;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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u32 SPIGetCapacity(CardType type)
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{
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2019-05-06 20:51:09 +00:00
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u32 sz[] = {9, 13, 16, 17, 18, 18, 19, 19, 20, 23, 19, 19};
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if (type == NO_CHIP || type > CHIP_LAST)
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return 0;
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else
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return 1 << sz[(int)type];
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result SPIWriteSaveData(CardType type, u32 offset, void* data, u32 size)
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{
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2019-05-06 20:51:09 +00:00
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u8 cmd[4] = {0};
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2018-05-14 06:52:41 +00:00
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u32 cmdSize = 4;
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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u32 end = offset + size;
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u32 pos = offset;
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2019-05-06 20:51:09 +00:00
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if (size == 0)
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return 0;
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2018-05-14 06:52:41 +00:00
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u32 pageSize = SPIGetPageSize(type);
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2019-05-06 20:51:09 +00:00
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if (pageSize == 0)
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return 0xC8E13404;
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2018-05-14 06:52:41 +00:00
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Result res = SPIWaitWriteEnd(type);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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size = (size <= SPIGetCapacity(type) - offset) ? size : SPIGetCapacity(type) - offset;
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while (pos < end) {
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switch (type) {
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2018-05-14 06:52:41 +00:00
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case EEPROM_512B:
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cmdSize = 2;
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2019-05-06 20:51:09 +00:00
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cmd[0] = (pos >= 0x100) ? SPI_512B_EEPROM_CMD_WRHI : SPI_512B_EEPROM_CMD_WRLO;
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cmd[1] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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break;
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case EEPROM_8KB:
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case EEPROM_64KB:
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cmdSize = 3;
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2019-05-06 20:51:09 +00:00
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cmd[0] = SPI_EEPROM_CMD_WRITE;
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cmd[1] = (u8)(pos >> 8);
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cmd[2] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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break;
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case EEPROM_128KB:
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cmdSize = 4;
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2019-05-06 20:51:09 +00:00
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cmd[0] = SPI_EEPROM_CMD_WRITE;
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cmd[1] = (u8)(pos >> 16);
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cmd[2] = (u8)(pos >> 8);
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cmd[3] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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break;
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case FLASH_256KB_1:
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case FLASH_256KB_2:
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case FLASH_512KB_1:
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case FLASH_512KB_2:
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case FLASH_1MB:
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case FLASH_512KB_INFRARED:
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case FLASH_256KB_INFRARED:
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cmdSize = 4;
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2019-05-06 20:51:09 +00:00
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cmd[0] = SPI_FLASH_CMD_PW;
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cmd[1] = (u8)(pos >> 16);
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cmd[2] = (u8)(pos >> 8);
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cmd[3] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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break;
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case FLASH_8MB:
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return 0xC8E13404; // writing is unsupported (so is reading? need to test)
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default:
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return 0; // never happens
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}
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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u32 remaining = end - pos;
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2019-05-06 20:51:09 +00:00
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u32 nb = pageSize - (pos % pageSize);
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2018-05-14 06:52:41 +00:00
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u32 dataSize = (remaining < nb) ? remaining : nb;
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2019-05-06 20:51:09 +00:00
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if ((res = SPIEnableWriting(type)))
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return res;
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if ((res = SPIWriteRead(type, cmd, cmdSize, NULL, 0, (void*)((u8*)data - offset + pos), dataSize)))
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return res;
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if ((res = SPIWaitWriteEnd(type)))
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return res;
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2018-05-14 06:52:41 +00:00
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pos = ((pos / pageSize) + 1) * pageSize; // truncate
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}
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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return 0;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result _SPIReadSaveData_512B_impl(u32 pos, void* data, u32 size)
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2019-05-06 20:51:09 +00:00
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{
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2018-05-14 06:52:41 +00:00
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u8 cmd[4];
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u32 cmdSize = 2;
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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u32 end = pos + size;
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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u32 read = 0;
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2019-05-06 20:51:09 +00:00
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if (pos < 0x100) {
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2018-05-14 06:52:41 +00:00
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u32 len = 0x100 - pos;
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2019-05-06 20:51:09 +00:00
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cmd[0] = SPI_512B_EEPROM_CMD_RDLO;
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cmd[1] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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Result res = SPIWriteRead(EEPROM_512B, cmd, cmdSize, data, len, NULL, 0);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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2018-05-14 06:52:41 +00:00
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read += len;
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}
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2019-05-06 20:51:09 +00:00
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if (end >= 0x100) {
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2018-05-14 06:52:41 +00:00
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u32 len = end - 0x100;
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2017-10-04 11:18:41 +00:00
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2018-05-14 06:52:41 +00:00
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cmd[0] = SPI_512B_EEPROM_CMD_RDHI;
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cmd[1] = (u8)(pos + read);
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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Result res = SPIWriteRead(EEPROM_512B, cmd, cmdSize, (void*)((u8*)data + read), len, NULL, 0);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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2018-05-14 06:52:41 +00:00
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}
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2019-05-06 20:51:09 +00:00
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2018-05-14 06:52:41 +00:00
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return 0;
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2017-10-04 11:18:41 +00:00
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}
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2017-12-18 19:43:35 +00:00
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Result SPIReadSaveData(CardType type, u32 offset, void* data, u32 size)
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2019-05-06 20:51:09 +00:00
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{
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u8 cmd[4] = {SPI_CMD_READ};
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2018-05-14 06:52:41 +00:00
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u32 cmdSize = 4;
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2019-05-06 20:51:09 +00:00
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if (size == 0)
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return 0;
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if (type == NO_CHIP)
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return 0xC8E13404;
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2018-05-14 06:52:41 +00:00
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Result res = SPIWaitWriteEnd(type);
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2019-05-06 20:51:09 +00:00
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if (res)
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return res;
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size = (size <= SPIGetCapacity(type) - offset) ? size : SPIGetCapacity(type) - offset;
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2018-05-14 06:52:41 +00:00
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u32 pos = offset;
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2019-05-06 20:51:09 +00:00
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switch (type) {
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2018-05-14 06:52:41 +00:00
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case EEPROM_512B:
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return _SPIReadSaveData_512B_impl(offset, data, size);
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break;
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case EEPROM_8KB:
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case EEPROM_64KB:
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cmdSize = 3;
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2019-05-06 20:51:09 +00:00
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cmd[1] = (u8)(pos >> 8);
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cmd[2] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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break;
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case EEPROM_128KB:
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cmdSize = 4;
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2019-05-06 20:51:09 +00:00
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cmd[1] = (u8)(pos >> 16);
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cmd[2] = (u8)(pos >> 8);
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cmd[3] = (u8)pos;
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2018-05-14 06:52:41 +00:00
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|
|
break;
|
|
|
|
case FLASH_256KB_1:
|
|
|
|
case FLASH_256KB_2:
|
|
|
|
case FLASH_512KB_1:
|
|
|
|
case FLASH_512KB_2:
|
|
|
|
case FLASH_1MB:
|
|
|
|
case FLASH_8MB:
|
|
|
|
case FLASH_512KB_INFRARED:
|
|
|
|
case FLASH_256KB_INFRARED:
|
|
|
|
cmdSize = 4;
|
2019-05-06 20:51:09 +00:00
|
|
|
cmd[1] = (u8)(pos >> 16);
|
|
|
|
cmd[2] = (u8)(pos >> 8);
|
|
|
|
cmd[3] = (u8)pos;
|
2018-05-14 06:52:41 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return 0; // never happens
|
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
return SPIWriteRead(type, cmd, cmdSize, data, size, NULL, 0);
|
2017-10-04 11:18:41 +00:00
|
|
|
}
|
|
|
|
|
2017-12-18 19:43:35 +00:00
|
|
|
Result SPIEraseSector(CardType type, u32 offset)
|
|
|
|
{
|
2019-05-06 20:51:09 +00:00
|
|
|
u8 cmd[4] = {SPI_FLASH_CMD_SE, (u8)(offset >> 16), (u8)(offset >> 8), (u8)offset};
|
|
|
|
if (type == NO_CHIP || type == FLASH_8MB)
|
|
|
|
return 0xC8E13404;
|
|
|
|
|
|
|
|
if (type < FLASH_256KB_1 && fill_buf == NULL) {
|
2018-05-14 06:52:41 +00:00
|
|
|
fill_buf = new u8[0x10000];
|
|
|
|
memset(fill_buf, 0xff, 0x10000);
|
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
Result res = SPIWaitWriteEnd(type);
|
2019-05-06 20:51:09 +00:00
|
|
|
|
|
|
|
if (type >= FLASH_256KB_1) {
|
|
|
|
if ((res = SPIEnableWriting(type)))
|
|
|
|
return res;
|
|
|
|
if ((res = SPIWriteRead(type, cmd, 4, NULL, 0, NULL, 0)))
|
|
|
|
return res;
|
|
|
|
if ((res = SPIWaitWriteEnd(type)))
|
|
|
|
return res;
|
2018-05-14 06:52:41 +00:00
|
|
|
}
|
|
|
|
// Simulate the same behavior on EEPROM chips.
|
2019-05-06 20:51:09 +00:00
|
|
|
else {
|
2019-05-18 20:51:58 +00:00
|
|
|
u32 sz = SPIGetCapacity(type);
|
|
|
|
res = SPIWriteSaveData(type, 0, fill_buf, (sz < 0x10000) ? sz : 0x10000);
|
2018-05-14 06:52:41 +00:00
|
|
|
return res;
|
|
|
|
}
|
|
|
|
return 0;
|
2017-10-04 11:18:41 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// The following routine use code from savegame-manager:
|
|
|
|
|
|
|
|
/*
|
|
|
|
* savegame_manager: a tool to backup and restore savegames from Nintendo
|
|
|
|
* DS cartridges. Nintendo DS and all derivative names are trademarks
|
|
|
|
* by Nintendo. EZFlash 3-in-1 is a trademark by EZFlash.
|
|
|
|
*
|
|
|
|
* auxspi.cpp: A thin reimplementation of the AUXSPI protocol
|
|
|
|
* (high level functions)
|
|
|
|
*
|
|
|
|
* Copyright (C) Pokedoc (2010)
|
|
|
|
*/
|
2019-05-06 20:51:09 +00:00
|
|
|
/*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation; either version 2 of the License, or
|
2017-10-04 11:18:41 +00:00
|
|
|
* (at your option) any later version.
|
2019-05-06 20:51:09 +00:00
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful, but
|
|
|
|
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
|
|
|
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
2017-10-04 11:18:41 +00:00
|
|
|
* for more details.
|
2019-05-06 20:51:09 +00:00
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License along
|
|
|
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
2017-10-04 11:18:41 +00:00
|
|
|
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
|
|
*/
|
|
|
|
|
2017-12-18 19:43:35 +00:00
|
|
|
Result _SPIIsDataMirrored(CardType type, int size, bool* mirrored)
|
|
|
|
{
|
2019-05-06 20:51:09 +00:00
|
|
|
u32 offset0 = (size - 1); // n KB
|
|
|
|
u32 offset1 = (2 * size - 1); // 2n KB
|
|
|
|
|
|
|
|
u8 buf1; // +0k data read -> write
|
|
|
|
u8 buf2; // +n k data read -> read
|
|
|
|
u8 buf3; // +0k ~data write
|
|
|
|
u8 buf4; // +n k data new comp buf2
|
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
Result res;
|
2019-05-06 20:51:09 +00:00
|
|
|
|
|
|
|
if ((res = SPIReadSaveData(type, offset0, &buf1, 1)))
|
|
|
|
return res;
|
|
|
|
if ((res = SPIReadSaveData(type, offset1, &buf2, 1)))
|
|
|
|
return res;
|
|
|
|
buf3 = ~buf1;
|
|
|
|
if ((res = SPIWriteSaveData(type, offset0, &buf3, 1)))
|
|
|
|
return res;
|
|
|
|
if ((res = SPIReadSaveData(type, offset1, &buf4, 1)))
|
|
|
|
return res;
|
|
|
|
if ((res = SPIWriteSaveData(type, offset0, &buf1, 1)))
|
|
|
|
return res;
|
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
*mirrored = buf2 != buf4;
|
|
|
|
return 0;
|
2017-10-04 11:18:41 +00:00
|
|
|
}
|
|
|
|
|
2017-12-18 19:43:35 +00:00
|
|
|
Result SPIGetCardType(CardType* type, int infrared)
|
|
|
|
{
|
2019-05-06 20:51:09 +00:00
|
|
|
u8 sr = 0;
|
|
|
|
u32 jedec = 0;
|
|
|
|
u32 tries = 0;
|
2018-05-14 06:52:41 +00:00
|
|
|
CardType t = (infrared == 1) ? FLASH_INFRARED_DUMMY : FLASH_STD_DUMMY;
|
2019-05-06 20:51:09 +00:00
|
|
|
Result res;
|
2018-05-14 06:52:41 +00:00
|
|
|
u32 jedecOrderedList[] = {0x204012, 0x621600, 0x204013, 0x621100, 0x204014, 0x202017};
|
2019-05-06 20:51:09 +00:00
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
u32 maxTries = (infrared == -1) ? 2 : 1; // note: infrared = -1 fails 1/3 of the time
|
2019-05-06 20:51:09 +00:00
|
|
|
while (tries < maxTries) {
|
2018-05-14 06:52:41 +00:00
|
|
|
res = SPIReadJEDECIDAndStatusReg(t, &jedec, &sr); // dummy
|
2019-05-06 20:51:09 +00:00
|
|
|
// fprintf(stderr, "JEDEC: 0x%016lX\n", jedec);
|
|
|
|
// fprintf(stderr, "SPIReadJEDECIDAndStatusReg: %016lX\n", res);
|
|
|
|
// fprintf(stderr, "CardType (While inside maxTries loop): %016lX\n", t);
|
|
|
|
if (res)
|
|
|
|
return res;
|
|
|
|
|
|
|
|
if ((sr & 0xfd) == 0x00 && (jedec != 0x00ffffff)) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((sr & 0xfd) == 0xF0 && (jedec == 0x00ffffff)) {
|
|
|
|
t = EEPROM_512B;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((sr & 0xfd) == 0x00 && (jedec == 0x00ffffff)) {
|
|
|
|
t = EEPROM_STD_DUMMY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
++tries;
|
|
|
|
t = FLASH_INFRARED_DUMMY;
|
2018-08-08 20:51:33 +00:00
|
|
|
}
|
|
|
|
|
2019-05-06 20:51:09 +00:00
|
|
|
// fprintf(stderr, "CardType (after the maxTries loop): %016lX\n", t);
|
|
|
|
|
|
|
|
if (t == EEPROM_512B) {
|
|
|
|
// fprintf(stderr, "Type is EEPROM_512B: %d\n", t);
|
2018-08-08 20:51:33 +00:00
|
|
|
*type = t;
|
|
|
|
return 0;
|
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
else if (t == EEPROM_STD_DUMMY) {
|
2018-05-14 06:52:41 +00:00
|
|
|
bool mirrored = false;
|
2019-05-06 20:51:09 +00:00
|
|
|
if ((res = _SPIIsDataMirrored(t, 8192, &mirrored))) {
|
|
|
|
return res;
|
2018-05-14 06:52:41 +00:00
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
if (mirrored)
|
|
|
|
t = EEPROM_8KB;
|
|
|
|
else {
|
|
|
|
if ((res = _SPIIsDataMirrored(t, 65536, &mirrored))) {
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
if (mirrored)
|
|
|
|
t = EEPROM_64KB;
|
|
|
|
else
|
|
|
|
t = EEPROM_128KB;
|
|
|
|
}
|
|
|
|
|
2018-05-14 06:52:41 +00:00
|
|
|
*type = t;
|
2019-05-06 20:51:09 +00:00
|
|
|
// fprintf(stderr, "Type: %d\n", t);
|
2018-05-14 06:52:41 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
else if (t == FLASH_INFRARED_DUMMY) {
|
|
|
|
if (infrared == 0)
|
|
|
|
*type = NO_CHIP; // did anything go wrong?
|
|
|
|
if (jedec == jedecOrderedList[0] || jedec == jedecOrderedList[1])
|
|
|
|
*type = FLASH_256KB_INFRARED;
|
|
|
|
else
|
|
|
|
*type = FLASH_512KB_INFRARED;
|
2018-05-14 06:52:41 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
else {
|
|
|
|
if (infrared == 1) {
|
2018-08-08 20:51:33 +00:00
|
|
|
*type = NO_CHIP; // did anything go wrong?
|
2019-05-06 20:51:09 +00:00
|
|
|
// fprintf(stderr, "infrared is 1, *type = NO_CHIP\n");
|
2018-08-08 20:51:33 +00:00
|
|
|
}
|
2019-05-06 20:51:09 +00:00
|
|
|
if (jedec == 0x204017) {
|
|
|
|
*type = FLASH_8MB;
|
|
|
|
return 0;
|
|
|
|
} // 8MB. savegame-manager: which one? (more work is required to unlock this save chip!)
|
|
|
|
if (jedec == 0x208013) {
|
|
|
|
*type = FLASH_512KB_1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i = 0; i < 6; ++i) {
|
|
|
|
if (jedec == jedecOrderedList[i]) {
|
|
|
|
*type = (CardType)((int)FLASH_256KB_1 + i);
|
|
|
|
// fprintf(stderr, "Found a jedec equal to one in the ordered list. Type: %016lX", *type);
|
2018-08-08 20:51:33 +00:00
|
|
|
return 0;
|
2019-05-06 20:51:09 +00:00
|
|
|
}
|
2018-05-14 06:52:41 +00:00
|
|
|
}
|
2018-08-08 20:51:33 +00:00
|
|
|
|
2019-05-06 20:51:09 +00:00
|
|
|
// fprintf(stderr, "*type = NO_CHIP\n");
|
2018-05-14 06:52:41 +00:00
|
|
|
*type = NO_CHIP;
|
|
|
|
return 0;
|
|
|
|
}
|
2017-10-04 11:18:41 +00:00
|
|
|
}
|