mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-04 23:39:24 +00:00
99 lines
3.1 KiB
C++
99 lines
3.1 KiB
C++
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <mesosphere.hpp>
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#include "kern_debug_log_impl.hpp"
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namespace ams::kern {
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namespace {
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enum UartRegister {
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UartRegister_THR = 0,
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UartRegister_IER = 1,
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UartRegister_FCR = 2,
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UartRegister_LCR = 3,
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UartRegister_LSR = 5,
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UartRegister_IRSA_CSR = 8,
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UartRegister_DLL = 0,
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UartRegister_DLH = 1,
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};
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KVirtualAddress g_uart_address = 0;
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NOINLINE u32 ReadUartRegister(UartRegister which) {
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return GetPointer<volatile u32>(g_uart_address)[which];
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}
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NOINLINE void WriteUartRegister(UartRegister which, u32 value) {
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GetPointer<volatile u32>(g_uart_address)[which] = value;
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}
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}
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bool KDebugLogImpl::Initialize() {
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/* Set the uart register base address. */
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g_uart_address = KMemoryLayout::GetUartAddress();
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/* Parameters for uart. */
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constexpr u32 BaudRate = 115200;
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constexpr u32 Pllp = 408000000;
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constexpr u32 Rate = 16 * BaudRate;
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constexpr u32 Divisor = (Pllp + Rate / 2) / Rate;
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/* Initialize the UART registers. */
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/* Set Divisor Latch Access bit, to allow access to DLL/DLH */
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WriteUartRegister(UartRegister_LCR, 0x80);
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ReadUartRegister(UartRegister_LCR);
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/* Program the divisor into DLL/DLH. */
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WriteUartRegister(UartRegister_DLL, Divisor & 0xFF);
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WriteUartRegister(UartRegister_DLH, (Divisor >> 8) & 0xFF);
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ReadUartRegister(UartRegister_DLH);
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/* Set word length to 3, clear Divisor Latch Access. */
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WriteUartRegister(UartRegister_LCR, 0x03);
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ReadUartRegister(UartRegister_LCR);
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/* Disable UART interrupts. */
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WriteUartRegister(UartRegister_IER, 0x00);
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/* Configure the FIFO to be enabled and clear receive. */
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WriteUartRegister(UartRegister_FCR, 0x03);
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WriteUartRegister(UartRegister_IRSA_CSR, 0x02);
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ReadUartRegister(UartRegister_FCR);
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return true;
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}
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void KDebugLogImpl::PutChar(char c) {
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while (ReadUartRegister(UartRegister_LSR) & 0x100) {
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/* While the FIFO is full, yield. */
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__asm__ __volatile__("yield" ::: "memory");
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}
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WriteUartRegister(UartRegister_THR, c);
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cpu::DataSynchronizationBarrier();
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}
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void KDebugLogImpl::Flush() {
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while ((ReadUartRegister(UartRegister_LSR) & 0x40) == 0) {
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/* Wait for the TMTY bit to be one (transmit empty). */
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}
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}
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}
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